Table Of ContentTesting and Diagnosis
of Analog Circuits
and Systems
Testing and Diagnosis
of Analog Circuits
and Systems
Edited by
Ruey-wen liu
Department of Electrical and Computer Engineering
University of Notre Dame
Jnm;I VAN NOSTRAND REINHOLD
~ ______ New York
Copyright © 1991 by Van Nostrand Reinhold
Softcover reprint of the hardcover 1s t edition 1991
Library of Congress Catalog Card Number: 90-45217
ISBN-13: 978-1-4615-9749-0 e-ISBN-13: 978-1-4615-9747-6
DOl: 10.1007/978-1-4615-9747-6
All rights reserved. No part of this work covered by the copyright hereon may be
reproduced or used in any form by any means-graphic, electronic, or mechanical,
including photocopying, recording, taping, or information storage and retrieval
systems-without written permission of the publisher.
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Library of Congress Cataloging in Publication Data
Liu, Ruey-wen
Testing and diagnosis of analog circuits and systems / Ruey-wen Liu.
p. cm.
Includes bibliographical references and index.
ISBN-13: 978-1-4615-9749-0
I. Analog electronic systems-Testing. I. Title
TK7870.L523 1991
621.381-dc20 90-45217
CIP
Contents
Preface ix
Contributors xv
Chapter 1. A Circuit Theoretic Approach to Analog Fault Diagnosis 1
Ruey-wen Liu
Background 1
An Introduction to Analog Fault Diagnosis 2
Important Issues of Analog Fault Diagnosis 5
The Element-Value Solvability Problem 6
A FaultlTolerance Compensation Model 8
k-Fault Diagnosis: The Ideal Case 10
k-Fault Diagnosis: The Tolerance Case 13
Illustrative Examples 18
Chapter 2. Linear Method vs. Nonlinear Method 37
T. Matsumoto and Y. Togawa
Setting of the Problem 38
Probability 40
Probability Measure 41
Perturbation of Parameters 44
Geometry of SF and TF 45
Linear Method Is as Powerful as the Nonlinear Method 51
vi Contents
Chapter 3. Topological Thstability Conditions for Analog
Fault Diagnosis 6S
Chen-Shang Lin
Theory 66
Applications 76
Chapter 4. Fault Diagnosis of Nonlinear Electronic Circuits 8S
Qiu Huang and Ruey-wen Liu
Fault Diagnosis of Linear Circuits 87
Fault Diagnosis of PWL Circuits 93
Examples 97
Appendix 112
Chapter 5. Analog Multifrequency Fault Diagnosis
with the Assumption of Limited Failures 117
Ray DeCarlo, Lawrence Rapisarda, and Mark Wicks
The CCM and the Fault Diagnosis Equations of [4] 118
A Motivational Example 122
Diagnosability for nf Faults 126
Limited Fault Algorithm 133
Limited Fault Algorithm Examples 137
Chapter 6. A Searching Approach Self· Testing Algorithm
for Analog Fault Diagnosis 147
Chin-Long Wey
Automatic Test Program Generation 148
Decision Algorithms 162
The Heuristic Algorithm 165
Parallel Processing for Analog Fault Diagnosis 168
Design for Testability 178
Chapter 7. An Artificial Intelligence Approach
to Analog Systems Diagnosis 187
Frank Pipitone, Kenneth Dejong, and William Spears
Qualitative Causal Models 191
The Treatment of Fault Probabilities 196
Best Test Strategies 203
FIS: An Implemented Diagnostic System 210
Current Applications of FIS 212
Chapter 8. Automatic Testing for Control Systems Conformance 217
Denis R. Towill
Historical Development of ATE 217
Contents vii
Transfer Function Testing 219
Return Signal Processing 221
Tuning of Large Electro-Mechanical Servosystems 221
The SUT Test Signature 225
Transfer Function Models of Control Systems 226
The "Fuzzy" Nature of Control System Behavior 227
Checkout Based on Quadratic Performance Criteria 229
"Closed Loop" Testing 230
Chapter 9. Testing of Analog Integrated Circuits 235
V. Visvanathan
Testing vs. Diagnosis 236
Digital vs. Analog Testing 237
Specification-Based Testing 239
Solution of the Test Tolerance Assignment Problem 241
Consideration for Fault-Madel-Based Testing 243
An Approach to Fault-Model-Based Testing 245
Chapter 10. A Unified Theory on Test Generation
for Analog/Digital Systems 251
Lang Tong and Ruey-wen Liu
Notation and Basic Concepts 252
Testability of Interconnected Systems 255
Reachability, Observability, and Testability 259
Test Generation for Interconnected Systems: Case Studies 262
Index 281
Preface
IS THE TOPIC ANALOG TESTING AND DIAGNOSIS TIMELY?
Yes, indeed it is.
Testing and Diagnosis is an important topic and fulfills a vital need for the
electronic industry. The testing and diagnosis ofd igital electronic circuits has
been successfuIly developed to the point that it can be automated. Unfortu
nately, its development for analog electronic circuits is still in its Stone Age.
The engineer's intuition is still the most powerful tool used in the industry!
There are two reasons for this. One is that there has been no pressing need
from the industry. Analog circuits are usuaIly small in size. Sometimes, the
engineer's experience and intuition are sufficient to fulfill the need. The
other reason is that there are no breakthrough results from academic re
search to provide the industry with critical ideas to develop tools. This is not
because of a lack of effort. Both academic and industrial research groups
have made major efforts to look into this problem. Unfortunately, the prob
lem for analog circuits is fundamentally different from and much more diffi
cult than its counterpart for digital circuits. These efforts have led to some
important findings, but are still not at the point of being practicaIly useful.
However, these situations are now changing.
The current trend for the design of VLSI chips is to use analog/digital
hybrid circuits, instead of digital circuits from the past. Therefore, even
Ix
x Preface
though the analog circuit may be small, the total circuit under testing is large.
The engineer's intuition may no longer be sufficient. There is an urgent need
for a more systematic approach to the problem of testing and diagnosis of
analog or analOg/digital hybrid electronic circuits.
Another trend toward a more systematic approach to the problem of test
ing and diagnosis of analog circuits is the recent development ofa nalog VLSI
chips. In neural networks, it is found that analog VLSI chips have advan
tages over digital VLSI chips in computational speed and adaptivity. In a
recent extensive study by DARPA, it has been found that neural networks
provide the only hope in sight for the successful development of intelligent
machines. If this hope becomes a reality, the demand for analog VLSI chips
would be tremendously high. The lack of testing and diagnosis technology
would be a bottleneck problem for the manufacturing of analog VLSI chips.
The urgency for the development of a viable analog testing and diagnosis
technology is now, not then.
In the meantime, there have been some breakthroughs at the frontiers of
academic research. The problem of diagnosis of linear circuits has been well
developed in the past and well understood. But their application to modern
circuits has been very limited because most modern devices are nonlinear,
especially under faulty conditions. The extension of linear theory onto non
linear ones is nontrivial because some nonlinear phenomena have to be dealt
with. These were bottleneck problems. Recently, some efficient and reliable
methods for nonlinear diagnosis have been developed. Two of them are
reported in this book. Another frontier is in the area of analog/digital
hybrid testing. Such technology does not exist at the present time, but will
be needed in the near future. Recently, a mathematical foundation for the
development of analOg/digital hybrid testing has been formulated. These
results can serve as a bridge to bring the academic research as close as it
has ever been to the technology. The need for a viable technology for the
analog testing and diagnosis from the industry is growing at this time. In
the meantime, academic researchers have been reaching out and trying to
touch the real world. I am very glad to see that this book is ready at this
particular time.
WHO MAY BE INTERESTED IN THE TOPIC
OF ANALOG TESTING AND DIAGNOSIS?
Testing and Diagnosis is an important engineering subject. It interacts with
engineering processes in at least three different ways: manufacturing, main
tenance, and research. Hence it is of immediate interest to electronic engi
neers. It also has appeal to academicians.
Preface xi
IC and VLSI Chip Manufacturing
A manufacturing process, such as the oxide thickness of an Ie chip, is di
rectly related to the circuit parameters to be manufactured. To make sure that a
manufacturing process will reliably produce Ie chips within a design specifica
tion, a design verification process is needed. This process usually involves simul
taneously both modifications of the manufacturing process and testing and
diagnosis of the chip. Hence, the technology to do so is clearly needed.
After a manufacturing process is set, it still cannot guarantee that every
chip manufactured will be within design specifications. This is due to un
avoidable manufacturing fluctuations. A testing process again is needed so
that bad chips can be identified and rejected. Furthermore, in order to in
crease the yield of a manufacturing process, it is economically feasible to
rewire those rejected faulty chips and change them from bad to good. This can
be done by designing redundant components on a VLSI chip. If and when a
faulty component is successfully identified (diagnosed), then a rewiring to its
redundant good component will make the VLSI chip good. Hence, a viable di
agnosis procedure is needed to enhance the yield of the manufacturing process.
The above gives two examples of why testing and diagnosis are important
to the Ie and VLSI chip manufacturing process.
Electron System Maintenance
During the past quarter century, the electronic engineering community
has witnessed tremendous strides in the art of electronics design. On the
other hand, maintenance of analog electronics has changed little since the
days of vacuum tubes. As such, our ability to design complex electronic cir
cuits is quickly outdistancing our ability to maintain them. In turn, the price
reductions accomplished by modern electronic technology have been paral
leled by the increasing maintenance and operational cost. Indeed, many in
dustries are finding that the life cycle maintenance cost for their electronic
equipment now exceeds their original capital investment. An urgent need for
maintenance cost reduction is now at hand.
The maintenance cost is related to the per unit cost of testing and diagno
sis of a faulty system and its recovery rate. The recovery rate is directly re
lated to the technology used and inversely related to the complexity of the
system under testing. Since modern electronic equipments become more and
more complex, it can only be offset by better and better technology. Hence,
it is of paramount importance to develop better testing and diagnosis tech
nology with lower per unit cost. This is the only long-term solution to the
ever-increasing maintenance cost.
Research
The topic of analog fault diagnosis does not fall into conventional topics
of circuit theory such as analysis, synthesis, and sensitivity. As synthesis is an
xli Preface
inverse problem of analysis, so fault diagnosis is an inverse problem of sensi
tivity. Hence, it is a new frontier for circuit theoretics. This area of research
was very active in the 1970s, but slowed down because of the lack of pressing
industrial need and the lack of breakthrough results beyond diagnosis of lin
ear circuits. With the recent development in analog VLSI chips, it will not be
surprising to see a renewed interest in analog fault diagnosis.
There is another uncharted area of research related to our topic: There is
an urgent need for new design methods from the electronic industry so that
the circuits so designed can be easily tested and diagnosed. Hence, the cost of
doing it can be reduced. Few papers in the literature have addressed this
problem.
ABOUT THIS BOOK
The material presented in this book is considered to be of value to all scien
tists and engineers concerned with testing and fault diagnosis of analog cir
cuits and systems. It covers fundamental principles, bottleneck problems,
and solutions, as well as many realistic illustrative examples. It is useful for
the test engineers as well as maintenance engineers of electronic industry. It
contains much fundamental information and hence could be useful as a ref
erence book to academicians, or as a library reference.
This book is divided into two parts. The first seven chapters are concerned
with fault diagnosis of analog electronic circuits, while the last three chapters
are concerned with testing.
Analog Fault Diagnosis
The fundamental principle of fault diagnosis of linear analog electronic
circuits is presented in the first two chapters. The background, the problem,
and the important issues are discussed in Chapter 1. Several methods are pre
sented and ccmpared. The k-fault diagnosis approach may be the most efficient
and effective approach. In Chapter 2, it is shown that this approach (named the
linear method) is as powerful as nonlinear methods. A bottleneck problem for
linear fault diagnosis is the existence of tolerance of linear parameters. In order
to resolve this problem, some effective methods are presented in Chapters 1, 12,
and 4. It is also shown in Chapter 2 that even if the testability condition is not
satisfied, it still can be diagnosed up to an equivalence class.
In theory development, it is convenient to assume that all faults are possi
ble and equally probable. In reality, it is not true. A testing engineer will
decide a fault-set to be tested. This fault-set consists of a set of faults most
likely to occur. How do we choose a set of testing points so that each fault in
the fault-set can be diagnosed? Answers to this question are given in Chap
ters 3 and 6. The solution in Chapter 3 may be more easily applied because its
