Table Of ContentEVALUATION
KIT
AVAILABLE TC7662B
CHARGE PUMP DC-TO-DC VOLTAGE CONVERTER
FEATURES GENERAL DESCRIPTION
(cid:1) Wide Operating Voltage Range: 1.5V to 15V The TC7662B is a pin-compatible upgrade to the Indus-
(cid:1) Boost Pin (Pin 1) for Higher Switching Frequency try standard TC7660 charge pump voltage converter. It
(cid:1) High Power Efficiency is 96% converts a +1.5V to +15V input to a corresponding – 1.5 to
(cid:1) Easy to Use – Requires Only 2 External Non-Critical – 15V output using only two low-cost capacitors, eliminating
Passive Components inductors and their associated cost, size and EMI.
(cid:1) Improved Direct Replacement for Industry Stan- The on-board oscillator operates at a nominal fre-
dard ICL7660 and Other Second Source Devices quency of 10kHz. Frequency is increased to 35kHz when
pin 1 is connected to V+, allowing the use of smaller external
capacitors. Operation below 10kHz (for lower supply current
APPLICATIONS applications) is also possible by connecting an external
(cid:1) Simple Conversion of +5V to ±5V Supplies capacitor from OSC to ground (with pin 1 open).
(cid:1) Voltage Multiplication V = ±nV The TC7662B is available in both 8-pin DIP and 8-pin
OUT IN small outline (SO) packages in commercial and extended
(cid:1) Negative Supplies for Data Acquisition Systems
temperature ranges.
and Instrumentation
(cid:1) RS232 Power Supplies
(cid:1) Supply Splitter, V = ±V /2 ORDERING INFORMATION
OUT S
Temperature
Part No. Package Range
PIN CONFIGURATION (DIP AND SOIC)
TC7662BCOA 8-Pin SOIC 0°C to +70°C
TC7662BCPA 8-Pin Plastic DIP 0°C to +70°C
BOOST 1 8 V+ BOOST 1 8 V+
CAP+ 2 7 OSC CAP+ 2 7 OSC TC7662BEOA 8-Pin SOIC – 40°C to +85°C
GND 3 TC7662BCPA 6 LOW GND 3 TC7662BCOA 6 LOW TC7662BEPA 8-Pin Plastic DIP – 40°C to +85°C
VOLTAGE (LV) VOLTAGE (LV)
TC7662BEPA TC7662BEOA
CAP– 4 5 VOUT CAP– 4 5 VOUT TC7660EV Evaluation Kit for
Charge Pump Family
FUNCTIONAL BLOCK DIAGRAM
V+ CAP+
8 2
1
BOOST
OSC 7 OSCILRLCATOR ÷ 2 VOLLETVAEGLE– 4 CAP–
TRANSLATOR
6
LV
5
VOUT
INTERNAL
VOLTAGE
REGULATOR
LOGIC
NETWORK
TC7662B
3
GND
© 2001 Microchip Technology Inc. DS21469A TC7662B-8 9/11/96
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
TC7662B
ABSOLUTE MAXIMUM RATINGS* Operating Temperature Range
C Suffix..................................................0°C to +70°C
Supply Voltage...................................................... +16.5V E Suffix .............................................– 40°C to +85°C
LV, Boost and OSC Inputs Voltage (Note 1) Storage Temperature Range ................– 65°C to +150°C
V+<5.5V.....................................– 0.3V to (V+ + 0.3V) Lead Temperature (Soldering, 10 sec) .................+300°C
>5.5V..................................(V+ – 5.5V) to (V+ + 0.3V)
Current Into LV (Note 1) * Static-sensitive device. Unused devices must be stored in conductive
V+ >3.5V............................................................ 20µA material. Protect devices from static discharge and static fields. Stresses
above those listed under "Absolute Maximum Ratings" may cause perma-
Output Short Duration
nent damage to the device. These are stress ratings only and functional
(VSUPPLY ≤ 5.5V).......................................Continuous operation of the device at these or any other conditions above those
Power Dissipation (T ≤ 70°C) (Note 2) indicated in the operation sections of the specifications is not implied.
A
Plastic DIP......................................................730mW Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
SO ..................................................................470mW
ELECTRICAL CHARACTERISTICS: V+ = 5V, T = +25°C, OSC = Free running, Test Circuit Figure 2, Unless
A
Otherwise Specified.
Symbol Parameter Test Conditions Min Typ Max Unit
I+ Supply Current (Note 3) R = ∞, +25°C — 80 160 µA
L
(Boost pin OPEN OR GND) 0°C ≤ T ≤ +70°C — — 180 µA
A
– 40°C ≤ T ≤ +85°C — — 180 µA
A
– 55°C ≤T ≤ +125°C — — 200 µA
A
I+ Supply Current 0°C ≤ T ≤ +70°C — — 300 µA
A
(Boost pin = V+) – 40°C ≤ T ≤ +85°C 350
A
– 55°C ≤ T ≤ +125°C 400
A
V+ Supply Voltage Range, High R = 10 kΩ, LV Open, T ≤ T ≤ T 3.0 — 15 V
H L MIN A MAX
(Note 4)
V+ Supply Voltage Range, Low R = 10 kΩ, LV to GND, T ≤ T ≤ T 1.5 — 3.5 V
L L MIN A MAX
R Output Source Resistance I = 20mA, 0°C ≤ T ≤ +70°C — 65 100 Ω
OUT OUT A
I = 20mA, – 40°C ≤ T ≤ +85°C — — 120 Ω
OUT A
I = 20mA, – 55°C ≤ T ≤ +125°C — — 150 Ω
OUT A
I = 3mA, V+ = 2V, LV to GND , — — 250 Ω
OUT
0°C ≤ T ≤ +70°C
A
I = 3mA, V+ = 2V, LV to GND , — — 300 Ω
OUT
– 40°C ≤ T ≤ +85°C
A
I = 3mA, V+ = 2V, LV to GND , — — 400 Ω
OUT
– 55°C ≤ T ≤ +125°C
A
f Oscillator Frequency C = 0,Pin 1 Open or GND 5 10 — kHz
OSC OSC
Pin 1 = V+ 35
P Power Efficiency R = 5kΩ 96 96 — %
Eff L
T ≤ T ≤ T 95 97
MIN A MAX
V Eff Voltage Conversion Efficiency R = ∞ 99 99.9 — %
OUT L
Z Oscillator Impedance V+ = 2V — 1 — MΩ
OSC
V+ = 5V — 100 — kΩ
NOTES:
1.Connecting any terminal to voltages greater than V+ or less than GND may cause destructive latch-up. It is recommended that no inputs from
sources operating from external supplies be applied prior to “power up” of the TC7662B.
2.Derate linearly above 50°C by 5.5 mW/°C.
3.In the test circuit, there is no external capacitor applied to pin 7. However, when the device is plugged into a test socket, there is usually a very
small but finite stray capacitance present, of the order of 5pF.
4.The TC7662B can operate without an external diode over the full temperature and voltage range. This device will function in existing designs which
incorporate an external diode with no degradation in overall circuit performance.
TC7662B-8 9/11/96 2 © 2001 Microchip Technology Inc. DS21469A
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
TC7662B
DETAILED DESCRIPTION THEORETICAL POWER EFFICIENCY
CONSIDERATIONS
The TC7662B contains all the necessary circuitry to
complete a negative voltage converter, with the exception of In theory, a voltage converter can approach 100%
two external capacitors which may be inexpensive 1µF efficiency if certain conditions are met:
polarized electrolytic types. The mode of operation of the
A. The drive circuitry consumes minimal power.
device may be best understood by considering Figure 2,
which shows an idealized negative voltage converter. Ca- B. The output switches have extremely low ON resistance
pacitor C is charged to a voltage V+ for the half cycle when and virtually no offset.
1
switches S1 and S3 are closed. (Note: Switches S2 and S4 C. The impedances of the pump and reservoir capacitors
are open during this half cycle.) During the second half cycle are negligible at the pump frequency.
of operation, switches S and S are closed, with S and S
2 4 1 3 The TC7662B approaches these conditions for nega-
open, thereby shifting capacitor C negatively by V+ volts.
1 tive voltage conversion if large values of C and C are used.
Charge is then transferred from C to C such that the 1 2
1 2 Energy is lost only in the transfer of charge between
voltage on C is exactly V+, assuming ideal switches and no
2 capacitors if a change in voltage occurs. The energy lost
load on C . The TC7662B approaches this ideal situation
2 is defined by:
more closely than existing non-mechanical circuits.
In the TC7662B, the four switches of Figure 2 are MOS
power switches; S1 is a P-channel device and S2, S3 and S4 E = 1/2 C1 (V12 – V22)
are N-channel devices. The main difficulty with this ap-
proach is that in integrating the switches, the substrates of where V1 and V2 are the voltages on C1 during the pump and
S3 and S4 must always remain reverse biased with respect transfer cycles. If the impedances of C1 and C2 are relatively
to their sources, but not so much as to degrade their “ON” high at the pump frequency (refer to Figure 2) compared to
resistances. In addition, at circuit start up, and under output the value of RL, there will be a substantial difference in
short circuit conditions (VOUT = V+), the output voltage must voltages V1 and V2. Therefore, it is desirable not only to
be sensed and the substrate bias adjusted accordingly. make C2 as large as possible to eliminate output voltage
Failure to accomplish this would result in high power losses ripple, but also to employ a correspondingly large value for
and probable device latchup. C1 in order to achieve maximum efficiency of operation.
The problem is eliminated in the TC7662B by a logic
Dos and Don’ts
network which senses the output voltage (V ) together
OUT
with the level translators, and switches the substrates of S
3 1. Do not exceed maximum supply voltages.
and S to the correct level to maintain necessary reverse
4
bias. 2. Do not connect the LV terminal to GND for supply
The voltage regulator portion of the TC7662B is an voltages greater than 3.5 volts.
integral part of the anti-latchup circuitry; however, its inher- 3. Do not short circuit the output to V+ supply for voltages
ent voltage drop can degrade operation at low voltages.
above 5.5 volts for extended periods; however,
Therefore, to improve low voltage operation, the “LV” pin
transient conditions including start-up are okay.
should be connected to GND, disabling the regulator. For
supply voltages greater than 3.5 volts, the LV terminal must S1 S2
be left open to insure latchup proof operation and prevent VIN
device damage.
C1
V+ IS
1 8
V+
2 7 (+5V)
10 CµF1 + 3 TC7662B 6 IL S3 S4 C2
4 5 RL VOUT = – VIN
VO
C2
+ 10 µF
NOTE: F or large va lues of COSC (>1000 pF), the values
of C1 and C2 should be increased to 100 µF.
Figure 1. TC7662B Test Circuit Figure 2. Idealized Negative Voltage Capacitor
© 2001 Microchip Technology Inc. DS21469A 3 TC7662B-8 9/11/96
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
TC7662B
4. When using polarized capacitors in the inverting mode, voltage and temperature (See the Output Source Resis-
the + terminal of C must be connected to pin 2 of the tance graphs), typically 23Ω at +25°C and 5V. Careful
1
TC7662B and the – terminal of C2 must be connected selection of C1 and C2 will reduce the remaining terms,
to GND. minimizing the output impedance. High value capacitors will
reduce the 1/(f x C ) component, and low ESR capaci-
PUMP 1
5. If the voltage supply driving the TC7662B has a large
tors will lower the ESR term. Increasing the oscillator fre-
source impedance (25-30 ohms), then a 2.2µF capaci-
quency will reduce the 1/(f x C ) term, but may have the
PUMP 1
tor from pin 8 to ground may be required to limit the
side effect of a net increase in output impedance when C >
rate of rise of the input voltage to less than 2V/µsec. 1
10µF and there is not enough time to fully charge the
capacitors every cycle. In a typical application when f =
OSC
10kHz and C = C = C = 10µF:
TYPICAL APPLICATIONS 1 2
1
Simple Negative Voltage Converter R ≅ 2 x 23 + + 4 x ESR + ESR
O (5 x 103 x 10 x 10-6) C1 C2
The majority of applications will undoubtedly utilize the
R ≅ (46 + 20 + 5 x ESR )Ω
O C
TC7662B for generation of negative supply voltages. Figure
3 shows typical connections to provide a negative supply
Since the ESRs of the capacitors are reflected in the
where a positive supply of +1.5V to +15V is available. Keep
output impedance multiplied by a factor of 5, a high value
in mind that pin 6 (LV) is tied to the supply negative (GND)
could potentially swamp out a low 1/(f x C ) term,
PUMP 1
for supply voltages below 3.5 volts.
rendering an increase in switching frequency or filter capaci-
tance ineffective. Typical electrolytic capacitors may have
V+
ESRs as high as 10Ω.
1 8
10 µF Output Ripple
2 7
+
– 3 TC7662B 6 ESR also affects the ripple voltage seen at the output.
RO
4 5 VOUT The total ripple is determined by 2 voltages, A and B, as
VOUT = –V+ – shown in Figure 4. Segment A is the voltage drop across the
– V+
10 µF+ + ESR of C2 at the instant it goes from being charged by C1
a. b. (current flowing into C2) to being discharged through the
load (current flowing out of C ). The magnitude of this
Figure 3. Simple Negative Converter and its Output Equivalent 2
current change is 2 x I , hence the total drop is 2 x I x
OUT OUT
The output characteristics of the circuit in Figure 3 can ESR volts. Segment B is the voltage change across C
C2 2
be approximated by an ideal voltage source in series with a during time t , the half of the cycle when C supplies current
2 2
resistance as shown in Figure 3b. The voltage source has a to the load. The drop at B is I x t /C volts. The peak-to-
OUT 2 2
value of–(V+). The output impedance (RO) is a function of peak ripple voltage is the sum of these voltage drops:
the ON resistance of the internal MOS switches (shown in
( )
1
Figure 2), the switching frequency, the value of C1 and C2, V ≅ + ESR x I
RIPPLE 2 x f x C C2 OUT
and the ESR (equivalent series resistance) of C and C . A PUMP 2
1 2
good first order approximation for R is:
O
R ≅ 2(R + R + ESR ) + 2(R + R +
O SW1 SW3 C1 SW2 SW4 t t
2 1
1
ESR ) + + ESR
C1 f x C C2
PUMP 1
f 0 B
(f = O S C , R = MOSFET switch resistance)
PUMP SWX
2
V
Combining the four R terms as R , we see that:
SWX SW
R ≅ 2 x R + 1 + 4 x ESR + ESR Ω –(V+) A
O SW C1 C2
f x C
PUMP 1
R , the total switch resistance, is a function of supply
SW Figure 4. Output Ripple
TC7662B-8 9/11/96 4 © 2001 Microchip Technology Inc. DS21469A
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
TC7662B
Paralleling Devices Changing the TC7662B Oscillator Frequency
Any number of TC7662B voltage converters may be It may be desirable in some applications (due to noise or
paralleled to reduce output resistance (Figure 5). The reser- other considerations) to increase the oscillator frequency.
voir capacitor, C , serves all devices, while each device This is achieved by one of several methods described
2
requires its own pump capacitor, C . The resultant output below:
1
resistance would be approximately: By connecting the BOOSTPin (Pin 1) to V+, the oscillator
charge and discharge current is increased and, hence the
R (of TC7662B) oscillator frequency is increased by approximately 3-1/2
R = OUT
OUT n (number of devices) times. The result is a decrease in the output impedance and
ripple. This is of major importance for surface mount appli-
cations where capacitor size and cost are critical. Smaller
capacitors, e.g., 0.1µF, can be used in conjunction with the
V+ Boost Pin in order to achieve similar output currents com-
1 8 pared to the device free running with C = C = 1µF or 10µF.
1 2
2 7 1 8 (Refer to graph of Output Source Resistance as a Function
C1 3 TC7662B 6 2 7 RL of Oscillator Frequency).
4 "1" 5 C1 3 TC7662B 6 Increasing the oscillator frequency can also be achieved
by overdriving the oscillator from an external clock as shown
4 "n" 5
in Figure 7. In order to prevent device latchup, a 1kΩ resistor
must be used in series with the clock output. In a situation
+ C2 where the designer has generated the external clock fre-
quency using TTL logic, the addition of a 10kΩ pullup
resistor to V+ supply is required. Note that the pump fre-
Figure 5. Paralleling Devices
quency with external clocking, as with internal clocking, will
be 1/2 of the clock frequency. Output transitions occur on the
Cascading Devices
positive-going edge of the clock.
The TC7662B may be cascaded as shown to produce
larger negative multiplication of the initial supply voltage.
V+ V+
However, due to the finite efficiency of each device, the
practical limit is 10 devices for light loads. The output voltage 1 8
1 kΩ
is defined by: CMOS
2 7
GATE
VOUT = – n(VIN) +
10µF 3 TC7662B 6
where n is an integer representing the number of devices 4 5 VOUT
cascaded. The resulting output resistance would be ap-
10µF
proximately the weighted sum of the individual TC7662B +
R values.
OUT
Figure 7. External Clocking
V+ It is also possible to increase the conversion efficiency
of the TC7662B at low load levels by lowering the oscillator
1 8
frequency. This reduces the switching losses, and is shown
2 7 1 8
10µF + 3 TC7662B 6 2 7 in Figure 8. However, lowering the oscillator frequency will
cause an undesirable increase in the impedance of the
4 "1" 5 10µF + 3 TC7662B 6 pump (C ) and reservoir (C ) capacitors; this is overcome by
1 2
4 "n" 5 VOUT increasing the values of C1 and C2 by the same factor that
+ 10µF the frequency has been reduced. For example, the addition
*VOUT = –nV+ 10µF of a 100pF capacitor between pin 7 (Osc) and V+ will lower
the oscillator frequency to 1kHz from its nominal frequency
of 10kHz (multiple of 10), and thereby necessitate a corre-
sponding increase in the value of C and C (from 10µF to
1 2
Figure 6. Cascading Devices for Increased Output Voltage 100µF).
© 2001 Microchip Technology Inc. DS21469A 5 TC7662B-8 9/11/96
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
TC7662B
V+ V+ VOUT =
1 8 –(V+–VF)
COSC 1 8
2 7
+ TC7662B 2 7 + C3
C1 3 6 3 TC7662B 6 D1
4 5 + C2VOUT +C1 4 5 D2 V(2O VU+T) =– (2 VF)
+
Figure 8. Lowering Oscillator Frequency C2 +
C4
Positive Voltage Doubling
Figure 10. Combined Negative Converter and Positive Doubler
The TC7662B may be employed to achieve positive
voltage doubling using the circuit shown in Figure 9. In this
Voltage Splitting
application, the pump inverter switches of the TC7662B are
used to charge C to a voltage level of V+ – V (where V+ is The bidirectional characteristics can also be used to
1 F
the supply voltage and V is the forward voltage on C plus split a higher supply in half, as shown in Figure 11. The
F 1
the supply voltage (V+) applied through diode D to capacitor combined load will be evenly shared between the two sides
2
C ). The voltage thus created on C becomes (2 V+) – (2 V ), and a high value resistor to the LV pin ensures start-up.
2 2 F
or twice the supply voltage minus the combined forward Because the switches share the load in parallel, the output
impedance is much lower than in the standard circuits, and
voltage drops of diodes D and D .
1 2
higher currents can be drawn from the device. By using this
The source impedance of the output (V ) will depend
OUT
on the output current, but for V+ = 5V and an output current circuit, and then the circuit of Figure 6, +15V can be
of 10 mA, it will be approximately 60Ω. converted (via +7.5V and –7.5V) to a nominal –15V, though
with rather high series resistance (~250Ω).
V+
V+
1 8
+
2 7 D1 VOUT = RL1 50 µF - 1 8
3 TC7662B 6 D2 (2 V+) – (2 VF) 2 7
VOUT =
4 5 + + V+–V– 50 + 3 TC7662B 6
C1 C2 2 µF -
4 5
RL2
Figure 9. Positive Voltage Multiplier
50 +
µF -
Combined Negative Voltage Conversion
V–
and Positive Supply Multiplication
Figure 10 combines the functions shown in Figures 3 Figure 11. Splitting a Supply in Half
and 9 to provide negative voltage conversion and positive
voltage doubling simultaneously. This approach would be,
for example, suitable for generating +9V and –5V from an
existing +5V supply. In this instance, capacitors C and C
1 3
perform the pump and reservoir functions, respectively, for
the generation of the negative voltage, while capacitors C
2
and C are pump and reservoir, respectively, for the doubled
4
positive voltage. There is a penalty in this configuration
which combines both functions, however, in that the source
impedances of the generated supplies will be somewhat
higher due to the finite impedance of the common charge
pump driver at pin 2 of the device.
TC7662B-8 9/11/96 6 © 2001 Microchip Technology Inc. DS21469A
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
TC7662B
Regulated Negative Voltage Supply
+5 LOGIC SUPPLY
In some cases, the output impedance of the TC7662B
can be a problem, particularly if the load current varies
substantially. The circuit of Figure 12 can be used to over- 12 11
TTL DATA
come this by controlling the input voltage, via an ICL7611 INPUT
low-power CMOS op amp, in such a way as to maintain a 16 1
4 3 RS232
nearly constant output voltage. Direct feedback is advisable, DATA
OUTPUT
since the TC7662B’s output does not respond instanta- 15
1 8
neously to change in input, but only after the switching delay.
The circuit shown supplies enough delay to accommodate 2 7 IH5142
+ 13 14
the TC7662B, while maintaining adequate feedback. An 1µF 3 TC7662B 6
–
increase in pump and storage capacitors is desirable, and 4 5
the values shown provide an output impedance of less than
5Ω to a load of 10mA. 1µF +5V
+ -5V
50k
+8V
– Figure 13. RS232 Levels from a Single 5V Supply
56k 50k +8V +10µF
–
V+
+
100k 1 8
2 7
+
100µF 3 TC7662B 6
-
4 5 V
OUT
800k 250K 100µF
VOLTAGE
ADJUST
Figure 12. Regulating the Output Voltage
© 2001 Microchip Technology Inc. DS21469A 7 TC7662B-8 9/11/96
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
TC7662B
TYPICAL CHARACTERISTICS
Supply Current vs. Temperature
(with Boost Pin = V ) Voltage Conversion
IN
1000 %)101.0
Y (
C
N
800 CIE100.5
FI Without Load
EF100.0
600 VIN = 12V N
O
A) SI 99.5
µ R
(DD400 VE 10K Load
I N
O 99.0
C
E
200 G
VIN = 5V A 98.5
T
L T = 25°C
O A
0 V 98.0
-40 -20 0 20 40 60 80 100 1 2 3 4 5 6 7 8 9 10 11 12
TEMPERATURE (°C) INPUT VOLTAGE V (V)
IN
Output Source Resistance vs. Supply Voltage Output Source Resistance vs. Temperature
100 100
Ω) Ω)
CE ( 70 CE ( 80 VIN = 2.5V
N N
A 50 A
T T
ESIS ESIS 60 VIN = 5.5V
R 30 R
E E
C C 40
R R
U U
O O
S S
T I = 20mA T 20
U OUT U
P T = 25°C P
T A T
U U
O 10 O
0
1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.511.5 12 -40 -20 0 20 40 60 80 100
SUPPLY VOLTAGE (V) TEMPERATURE (°C)
Output Voltage vs. Output Current Supply Current vs. Temperature
0 200
175
-2
(V)T µA)150
E VOU -4 NT I (DD125
AG -6 RE100 VIN = 12.5V
T R
UTPUT VOL -1-08 UPPLY CU 7550 VIN = 5.5V
O S 25
-12 0
0 10 20 30 40 50 60 70 80 90 100 -40 -20 0 20 40 60 80 100
OUTPUT CURRENT (mA) TEMPERATURE (°C)
TC7662B-8 9/11/96 8 © 2001 Microchip Technology Inc. DS21469A
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
TC7662B
TYPICAL CHARACTERISTICS (cont.)
Unloaded Osc Freq vs. Temperature
Unloaded Osc Freq vs. Temperature with Boost Pin = V
IN
12 60
Hz)10 Hz)50
k k
Y ( Y (
C C
N 8 N 40
E E V = 5V
U U IN
Q Q
RE 6 VIN = 5V RE 30
R F R F VIN = 12V
O 4 O 20
T T
LLA VIN = 12V LLA
CI 2 CI 10
S S
O O
0 0
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
TEMPERATURE (°C) TEMPERATURE (°C)
PACKAGE DIMENSIONS
8-Pin Plastic DIP
PIN 1
.260 (6.60)
.240 (6.10)
.045 (1.14) .070 (1.78)
.030 (0.76) .040 (1.02) .310 (7.87)
.400 (10.16) .290 (7.37)
.348 (8.84)
.200 (5.08)
.140 (3.56)
.040 (1.02)
.020 (0.51) .015 (0.38) 3° MIN.
.150 (3.81)
.008 (0.20)
.115 (2.92)
.400 (10.16)
.310 (7.87)
.110 (2.79) .022 (0.56)
.090 (2.29) .015 (0.38)
Dimensions: inches (mm)
© 2001 Microchip Technology Inc. DS21469A 9 TC7662B-8 9/11/96
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
TC7662B
PACKAGE DIMENSIONS (Cont.)
8-Pin SOIC
.157 (3.99) .244 (6.20)
.150 (3.81) .228 (5.79)
.050 (1.27) TYP.
.197 (5.00)
.189 (4.80)
.069 (1.75)
.053 (1.35) 8° MAX. .010 (0.25)
.007 (0.18)
.020 (0.51) .010 (0.25)
.050 (1.27)
.013 (0.33) .004 (0.10)
.016 (0.40)
Dimensions: inches (mm)
TC7662B-8 9/11/96 10 © 2001 Microchip Technology Inc. DS21469A
