Design for Manufacturability and Statistical Design: A Constructive Approach

314 Pages·2008·20.564 MB·English

by  Michael Orshansky, Sani R. Nassif, Duane Boning (auth.)

Design for Manufacturability
and Statistical Design
A Constructive Approach
Series on Integrated Circuits and Systems
Series Editor: Anantha Chandrakasan
Massachusetts Institute of Technology
Cambridge, Massachusetts

Design for Manufacturability and Statistical Design: A Constructive Approach
Michael Orshansky, Sani R. Nassif, and Duane Boning
ISBN 978-0-387-30928-6
Low Power Methodology Manual: For System-on-Chip Design
Michael Keating, David Flynn, Rob Aitken, Alan Gibbons, and Kaijian Shi
ISBN 978-0-387-71818-7
Modern Circuit Placement: Best Practices and Results
Gi-Joon Nam and Jason Cong
ISBN 978-0-387-36837-5
CMOS Biotechnology
Hakho Lee, Donhee Ham and Robert M. Westervelt
ISBN 978-0-387-36836-8
SAT-Based Scalable Formal Verification Solutions
Malay Ganai and Aarti Gupta
ISBN 978-0-387-69166-4, 2007
Ultra-Low Voltage Nano-Scale Memories
Kiyoo Itoh, Masashi Horiguchi and Hitoshi Tanaka
ISBN 978-0-387-33398-4, 2007
Routing Congestion in VLSI Circuits: Estimation and Optimization
Prashant Saxena, Rupesh S. Shelar, Sachin Sapatnekar
ISBN 978-0-387-30037-5, 2007
Ultra-Low Power Wireless Technologies for Sensor Networks
Brian Otis and Jan Rabaey
ISBN 978-0-387-30930-9, 2007
Sub-Threshold Design for Ultra Low-Power Systems
Alice Wang, Benton H. Calhoun and Anantha Chandrakasan
ISBN 978-0-387-33515-5, 2006
High Performance Energy Efficient Microprocessor Design
Vojin Oklibdzija and Ram Krishnamurthy (Eds.)
ISBN 978-0-387-28594-8, 2006
Abstraction Refinement for Large Scale Model Checking
Chao Wang, Gary D. Hachtel, and Fabio Somenzi
ISBN 978-0-387-28594-2, 2006
A Practical Introduction to PSL
Cindy Eisner and Dana Fisman
ISBN 978-0-387-35313-5, 2006
Thermal and Power Management of Integrated Systems
Arman Vassighi and Manoj Sachdev
ISBN 978-0-387-25762-4, 2006
Leakage in Nanometer CMOS Technologies
Siva G. Narendra and Anantha Chandrakasan
ISBN 978-0-387-25737-2,2005
Continued after index
Michael Orshansky Sani R. Nassif
• •
Duane Boning
Design for Manufacturability
and Statistical Design

A Constructive Approach
ABC
Michael Orshansky Sani R. Nassif
The University of Texas at Austin IBM Research Laboratories
Austin, TX Austin, TX
USA USA

Duane Boning
Massachusetts Institute of Technology
Cambridge, MA
USA

Series Editor:
Anantha Chandrakasan
Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology
Cambridge, MA 02139
USA

An image by Eugene Timerman used in cover design
Library of Congress Control Number: 2007933405

ISBN 978-0-387-30928-6 e-ISBN 978-0-387-69011-7
©2008 Springer Science+Business Media, LLC
All rights reserved. This work may not be translated or copied in whole or in part without the written
permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY
10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection
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The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are
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Printed on acid-free paper.
9 8 7 6 5 4 3 2 1
springer.com
To Leo, Mariya, Boris, Yana and Zhenya
Michael
To Cosette, Julie, Victoria and Kamal
Sani
To my family
Duane
Preface
Progress in microelectronics over the last several decades has been intimately
linked to our ability to accurately measure, model, and predict the physical
properties of solid-state electronic devices. This ability is currently endan-
gered by the manufacturing and fundamental limitations of nanometer scale
technology, that result in increasing unpredictability in the physical proper-
ties of semiconductor devices. Recent years have seen an explosion of interest
in Design for Manufacturability (DFM) and in statistical design techniques.
This interest is directly attributed to the difficulties of manufacturing of in-
tegrated circuits in nanometer scale CMOS technologies with high functional
and parametric yield.
The scaling of CMOS technologies brought about the increasing magni-
tude of variability of key parameters affecting the performance of integrated
circuits. The large variation can be attributed to several factors. The first is
the rise of multiple systematic sources of parameter variability caused by the
interaction between the manufacturing process and the design attributes. For
example, optical proximity effects cause polysilicon feature sizes to vary de-
pendingonthelocallayoutsurroundings,whilecopperwirethicknessstrongly
depends on the local wire density because of chemical-mechanical polishing.
The second is that while technology scaling reduces the nominal values of
key process parameters, such as effective channel length, our ability to corre-
spondinglyimprovemanufacturingtolerances,suchasmaskfabricationerrors
and mask overlay control, is limited. This results in an increase in the rela-
tive amount of variations observed. The third, and most profound, reason for
thefutureincreaseinparametric variability isthattechnologyisapproaching
the regime of fundamental randomness in the behavior of silicon structures.
For example, the shrinking volume of silicon that forms the channel of the
MOS transistor will soon contain a small countable number of dopant atoms.
Because the placement of these dopant atoms is random, the final number of
atomsthatendupinthechannelofeachtransistorisarandomvariable.Thus,
the threshold voltage of the transistor, which is determined by the number
VIII Preface
of dopant atoms, will also exhibit significant variation, eventually leading to
variation in circuit-level performances, such as delay and power.
Thisbookpresentsanoverviewofthemethodsthatneedtobemasteredin
understanding state-of-the-art Design for Manufacturability (DFM) and Sta-
tisticalDesign(SD)methodologies.Broadly,designformanufacturabilityisa
setoftechniquesthatattempttofixthesystematicsourcesofvariability,such
as those due to photolithography and CMP. Statistical design, on the other
hand, deals with the random sources of variability. Both paradigms must op-
erate within a common framework, and their joint understanding is one of
the objectives of this book. The areas of design for manufacturability and
statistical design are still being actively developed and the established canon
of methods and principles does not yet exist. This book attempts to provide
a constructive treatment of the causes of variability, the methods for statis-
tical data characterization, and the techniques for modeling, analysis, and
optimization of integrated circuits to improve yield. The objective of such a
constructive approach is to formulate a consistent set of methods and prin-
ciples that allow rigorous statistical design and design for manufacturability
from device physics to large-scale circuit optimization.
Writing about relatively new areas like design for manufacturability and
statistical design presents its difficulties. The subjects span a wide area be-
tween design and manufacturing making it impossible to do justice to the
whole area in this one volume. We also limit our discussion to problems di-
rectly related to variability, with the realization that the term DFM may be
understood to refer to topics that we do not address in this book. Thus, we
do not discuss topics related to catastrophic yield modeling due to random
defects and particles, and the accompanying issues of critical area, via dou-
bling, wire spreading, and other layout optimization strategies for random
yield improvement. These topics have been researched extensively, and there
are excellent books on the subject, notably [89] and [204].
Also, with the rapid continuous progress occurring at the time of this
writing, it is the authors’ sincere hope that many of the issues and problems
outlined in this book will shortly be irrelevant solved problems. We assume
that the reader has had a thorough introduction to integrated circuits design
and manufacturing, and that the basics of how one creates an IC from the
high level system-oriented view down to the behavior of a single MOSFET
are well understood. For a refresher, we would recommend [75] and [5].
The book is organized in four major parts. The first part on Sources
ofVariability contains the three chapters of the book that deal with three
major sources of variability: front-end variability impacting devices (Chapter
2), back-end variability impacting metal interconnect (Chapter 3), and envi-
ronmental variability (Chapter 4). The second part on Variability Character-
ization and Analysis contains two chapters. Chapter 5 discusses the design
of test structures for variability characterization. Chapter 6 deals with the
statistically sound analysis of the results of measurements that are needed to
create rigorous models of variability. The third part is on Design Techniques
Preface IX
for Systematic Manufacturability Problems, and deals with techniques of de-
sign for manufacturability. Chapter 7 describes the interaction of the design
and the lithographic flow, and methods for improving printability. Chapter 8
isdevotedtoadescriptionoftechniquesformetalfillrequiredtoensuregood
planarity of multi-level interconnect structures. The final part on Statistical
Circuit Design is devoted to statistical design techniques proper: it contains
four chapters dealing with the prediction and mitigation of the impact of
variabilityoncircuits.Chapter9presentsstrategiesforstatisticalcircuitsim-
ulation. Chapter 10 discusses the methods for system-level statistical timing
analysis using static timing analysis techniques. In Chapter 11, the impact of
variabilityonleakagepowerconsumptionisdiscussed.Thefinalchapterofthe
book,Chapter12,isdevotedtostatisticalandrobustoptimizationtechniques
for improving parametric yield.
This book would not be possible without the generous help and support
of a lot of people: our colleagues and graduate students. Several individuals
have been kind enough to read through the entire manuscript or its parts,
andgivetheauthorsessentialfeedback.Theircommentsandsuggestionshave
helpedustomakethisbookbetter.WewouldliketospecificallythankAseem
Agarwal,ShayakBanerjee,PuneetGupta,NagibHakim,YeheaIsmail,Murari
Mani, Dejan Markovic, Alessandra Nardi, Ashish Singh, Ashish Srivastava,
Brian Stine, Wei-Shen Wang, Bin Zhang, and Vladimir Zolotov. We want
to particularly thank Wojciech Maly and Lou Scheffer for reading the entire
manuscript and giving us invaluable advice. We thank Denis Gudovskiy for
his help with typesetting. Carl Harris, our publisher at Springer, has been a
source of encouragement throughout the process of writing. And, of course,
this book owes an enormous debt to our families.
Michael Orshansky, Austin, Texas
Sani Nassif, Austin, Texas
Duane Boning, Boston, Massachusetts
July 2007
Contents
1 INTRODUCTION......................................... 1
1.1 RISE OF LAYOUT CONTEXT DEPENDENCE............ 2
1.2 VARIABILITY AND UNCERTAINTY..................... 3
1.3 CHARACTERIZATION VS. MODELING.................. 5
1.4 MODEL TO HARDWARE MATCHING ................... 6
1.5 DESIGN FOR MANUFACTURABILITY
VS. STATISTICAL DESIGN ............................. 6
Part I Sources of Variability
2 FRONT END VARIABILITY ............................. 11
2.1 INTRODUCTION....................................... 11
2.2 VARIABILITY OF GATE LENGTH ...................... 15
2.2.1 Gate Length Variability: Overview................... 15
2.2.2 Contributions of Photolithography .................. 16
2.2.3 Impact of Etch.................................... 20
2.2.4 Line Edge Roughness .............................. 22
2.2.5 Models of L Spatial Correlation.................. 24
gate
2.3 GATE WIDTH VARIABILITY ........................... 26
2.4 THRESHOLD VOLTAGE VARIABILITY.................. 27
2.5 THIN FILM THICKNESS................................ 32
2.6 LATTICE STRESS...................................... 35
2.7 VARIABILITY IN EMERGING DEVICES ................. 37
2.8 PHYSICAL VARIATIONS DUE TO AGING
AND WEAROUT ....................................... 39
2.9 SUMMARY ............................................ 41
3 BACK END VARIABILITY .............................. 43
3.1 INTRODUCTION....................................... 43
3.2 COPPER CMP ......................................... 44
3.3 COPPER ELECTROPLATING........................... 48
XII Contents
3.4 MULTILEVEL COPPER INTERCONNECT VARIATION ... 50
3.5 INTERCONNECT LITHOGRAPHY AND ETCH
VARIATION ........................................... 52
3.6 DIELECTRIC VARIATION .............................. 54
3.7 BARRIER METAL DEPOSITION ........................ 54
3.8 COPPER AND VIA RESISTIVITY ....................... 55
3.9 COPPER LINE EDGE ROUGHNESS ..................... 56
3.10 CARBON NANOTUBE INTERCONNECTS ............... 57
3.11 SUMMARY ............................................ 57
4 ENVIRONMENTAL VARIABILITY ...................... 59
4.1 INTRODUCTION....................................... 59
4.2 IMPACT OF ENVIRONMENTAL VARIABILITY .......... 60
4.3 ANALYSIS OF VOLTAGE VARIABILITY................. 66
4.3.1 Power Grid Analysis............................... 67
4.3.2 Estimation of Power Variability ..................... 71
4.4 SYSTEMATIC ANALYSIS OF TEMPERATURE
VARIABILITY ......................................... 74
4.5 OTHER SOURCES OF VARIABILITY.................... 82
4.6 SUMMARY ............................................ 82
Part II Variability Characterization and Analysis
5 TEST STRUCTURES FOR VARIABILITY............... 85
5.1 TEST STRUCTURES: CLASSIFICATION AND FIGURES
OF MERIT............................................. 85
5.2 CHARACTERIZATION USING SHORT LOOP FLOWS .... 87
5.3 TRANSISTOR TEST STRUCTURES ..................... 92
5.4 DIGITAL TEST STRUCTURES .......................... 94
5.5 SUMMARY ............................................ 98
6 STATISTICAL FOUNDATIONS OF DATA ANALYSIS
AND MODELING ........................................101
6.1 A BRIEF PROBABILITY PRIMER.......................102
6.2 EMPIRICAL MOMENT ESTIMATION ...................104
6.3 ANALYSIS OF VARIANCE AND ADDITIVE MODELS.....106
6.4 CASE STUDIES: ANOVA FOR GATE LENGTH
VARIABILITY .........................................109
6.5 DECOMPOSITION OF VARIANCE INTO SPATIAL
SIGNATURES..........................................113
6.6 SPATIAL STATISTICS: DATA ANALYSIS
AND MODELING ......................................118
6.6.1 Measurements and Data Analysis....................118
6.6.2 Modeling of Spatial Variability......................119
6.7 SUMMARY ............................................122