Complex Digital Circuits

180 Pages·2019·7.277 MB·English

by  Jean-Pierre Deschamps, Elena Valderrama, Lluís Terés

Jean-Pierre Deschamps · Elena Valderrama ·
Lluís Terés
Complex
Digital
Circuits
Complex Digital Circuits
Jean-Pierre Deschamps
(cid:129)
Elena Valderrama Lluís Terés
(cid:129)
Complex Digital Circuits
123
Jean-Pierre Deschamps ElenaValderrama
Tarragona, Spain Escolad’Enginyeria
Campusdela UAB
Lluís Terés Bellaterra, Spain
Institute of Microelectronics
of Barcelona
Campusdela UAB
Bellaterra, Spain
ISBN978-3-030-12652-0 ISBN978-3-030-12653-7 (eBook)
https://doi.org/10.1007/978-3-030-12653-7
LibraryofCongressControlNumber:2019931840
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To our friend and colleague Jordi Aguiló, for his essential
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Preface
Digitalsystemsconstituteabasictechnicaldiscipline,essentialtopractically
any engineer. For that reason, the Engineering School of the Autonomous
University of Barcelona (UAB) has designed, a couple of years ago, an
introductory course entitled “Digital Systems: from Logic Gates to Proces-
sors.” It is available on the Coursera massive open online course (MOOC)
platform. A book including all the course material has recently been pub-
lished.1 This second book aims at continuing and at going deeper into some
ofthetopicsdealtwithintheabove-mentionedcourseandrelated book.So,
this is not an introductory course but a more in deep approach to digital
systems.
Complex systems are made up of processors executing programs, mem-
ories that store instructions and data, buses that transmit data, input–output
interfaces that permit to communicate with other systems or with human
usersandotherperipheralsofdifferenttypes.Manyofthosecomponentsare
already available under the form of commercial off-the-shell products or of
intellectual property (IP) cores. The latter virtual components are synthe-
sizabledescriptionsinsomehardwaredescriptionlanguageorevenphysical
descriptions,forexample,integratedcircuitlayoutsforASICsorbit-streams
for FPGAs.
Thus, the development of a complex digital system generally consists in
choosing components that permit to implement the desired functions and to
reach the specified performance. Those components must be integrated and
interconnected within some physical support (printed circuit board, multi-
chip module, application-Specific integrated circuit and field-programmable
gate array). Furthermore, some of those components must be programmed.
Actually, a common system structure is a (set of) microprocessor(s) exe-
cuting the system tasks plus several peripherals such as input–output inter-
faces, device drivers and others.
Some systems must also include specific (non-preexisting) components
that implement algorithms whose execution on an instruction set processor
should be too slow. Typical examples of such complex algorithms are:
long-operand arithmetic operations, floating-point operations, encoding and
processing of different types of signals, data ciphering and many others.
Thus, the initial specification of the components that need a specific devel-
opment work most often is an algorithm.
1Deschamps JP, Valderrama E, Terés Ll (2017) Digital Systems: from Logic Gates to
Processors.Springer,NewYork.
vii
viii Preface
Thecentraltopicofthisbookisthedescriptionofsynthesismethodsthat
permit to transform an initial algorithm into a specific component—a digital
circuit—that satisfies some constraints such as minimum speed, maximum
cost, maximum size, maximum power consumption or maximum time to
market. This book is not about the development of complete and complex
digitalsystems,atopicthatincludesbothsoftwareandhardwareaspects,but
about the design of digital circuits.
Nowadays, several commercial synthesis tools permit to translate an
algorithmic initial description to a digital circuit. In fact, those tools allow
synthesizing the circuit in a partially automatic way: the designer generates
the initial functional definition, for example, a C program, and guides the
synthesis tool all along the processing steps. So, this book addresses to
several types of research and development engineers. It describes synthesis
methods and optimization tools, so that it addresses to developers of syn-
thesis tools. It also addresses to developers of specific digital components,
even if they use automatic synthesis tools, helping them to understand the
way those tools are working and which are the choices to be made at each
synthesis step.
As already pointed out, this is not an introductory text so that some
previousknowledge of digital circuit design isassumed. Abasic knowledge
of the hardware description language VHDL is also recommended. This
language is used to model digital circuits and is the input language to sim-
ulation and synthesis tools. Algorithms are defined using a pseudocode
similar to VHDL. In some cases, executable VHDL processes are also used
tocheckthe correction ofthe proposedalgorithms. Allexecutable programs
are available at the Authors’ web sites www.arithmetic-circuits.org and
www.cnm.es/*icas/books-courses.
Tarragona, Spain Jean-Pierre Deschamps
Bellaterra, Spain Elena Valderrama
Bellaterra, Spain Lluís Terés
Acknowledgements
Theauthorsthankthepeoplewhohavehelpedthemindevelopingthisbook,
especially Prof. Gustavo Sutter who developed part of the executable pro-
grams available at the Authors’ web sites. The authors are grateful to the
following institutions for providing them the means for carrying this work
through to a successful conclusion: Autonomous University of Barcelona
(UAB) and National Center of Microelectronics (IMB-CNM-CSIC).
ix
Contents
1 Architecture of Digital Circuits .... .... .... .... ..... .... 1
1.1 Introductory Example. .... .... .... .... .... ..... .... 1
1.2 Data Path and Control Unit .... .... .... .... ..... .... 4
1.3 Exercises.. .... ..... .... .... .... .... .... ..... .... 6
Bibliography... .... ..... .... .... .... .... .... ..... .... 6
2 Scheduling and Resource Assignment ... .... .... ..... .... 7
2.1 Introductory Example. .... .... .... .... .... ..... .... 7
2.2 Precedence Graph.... .... .... .... .... .... ..... .... 10
2.3 Optimization Problems .... .... .... .... .... ..... .... 14
2.4 Resource Assignment . .... .... .... .... .... ..... .... 16
2.5 Final Example.. ..... .... .... .... .... .... ..... .... 21
2.5.1 Data Path..... .... .... .... .... .... ..... .... 21
2.5.2 Complete Circuit... .... .... .... .... ..... .... 28
2.5.3 Test.... ..... .... .... .... .... .... ..... .... 31
2.6 Comments. .... ..... .... .... .... .... .... ..... .... 32
2.7 Exercises.. .... ..... .... .... .... .... .... ..... .... 33
Bibliography... .... ..... .... .... .... .... .... ..... .... 34
3 Pipeline... .... .... ..... .... .... .... .... .... ..... .... 35
3.1 Introductory Example. .... .... .... .... .... ..... .... 35
3.2 Segmentation .. ..... .... .... .... .... .... ..... .... 40
3.3 Circuit Transformations ... .... .... .... .... ..... .... 47
3.3.1 Combinational to Pipelined Transformations... .... 48
3.3.2 Digital Signal Processing. .... .... .... ..... .... 51
3.4 Interconnection of Pipelined Components.. .... ..... .... 56
3.5 Self-timed Circuits ... .... .... .... .... .... ..... .... 56
3.6 Exercises.. .... ..... .... .... .... .... .... ..... .... 61
Bibliography... .... ..... .... .... .... .... .... ..... .... 62
4 Loops .... .... .... ..... .... .... .... .... .... ..... .... 63
4.1 Introductory Example. .... .... .... .... .... ..... .... 63
4.2 Iterative Versus Sequential Implementation of Loops.. .... 67
4.3 Pipelined Implementation of Loops... .... .... ..... .... 68
4.4 Digit-Serial Processing .... .... .... .... .... ..... .... 71
4.5 Exercises.. .... ..... .... .... .... .... .... ..... .... 73
Bibliography... .... ..... .... .... .... .... .... ..... .... 73
xi
xii Contents
5 Other Topics of Data Path Synthesis.... .... .... ..... .... 75
5.1 Data Path Connectivity.... .... .... .... .... ..... .... 75
5.1.1 Complete Connectivity .. .... .... .... ..... .... 75
5.1.2 An Optimization Problem .... .... .... ..... .... 76
5.1.3 Sequential Implementation.... .... .... ..... .... 79
5.2 Memory Blocks ..... .... .... .... .... .... ..... .... 81
5.2.1 Register Files . .... .... .... .... .... ..... .... 82
5.2.2 First-In First-Out Memories... .... .... ..... .... 84
5.2.3 First-In Last-Out Memories... .... .... ..... .... 87
5.3 Programmable Computation Resources.... .... ..... .... 90
5.4 Sequential Implementation . .... .... .... .... ..... .... 93
5.5 Hierarchical Description ... .... .... .... .... ..... .... 96
5.6 Exercises.. .... ..... .... .... .... .... .... ..... .... 98
Bibliography... .... ..... .... .... .... .... .... ..... .... 99
6 Control Unit Synthesis ... .... .... .... .... .... ..... .... 101
6.1 Command Encoding.. .... .... .... .... .... ..... .... 101
6.2 Hierarchical Control Unit .. .... .... .... .... ..... .... 106
6.3 Variable-Latency Operations.... .... .... .... ..... .... 111
6.4 Sequencers and Microprograms . .... .... .... ..... .... 116
6.5 Exercises.. .... ..... .... .... .... .... .... ..... .... 123
Bibliography... .... ..... .... .... .... .... .... ..... .... 123
7 Input–Output Interfaces .. .... .... .... .... .... ..... .... 125
7.1 General Concepts .... .... .... .... .... .... ..... .... 125
7.2 Buses .... .... ..... .... .... .... .... .... ..... .... 127
7.2.1 Synchronous Bus... .... .... .... .... ..... .... 127
7.2.2 Asynchronous Bus . .... .... .... .... ..... .... 132
7.2.3 Multi-master Bus Systems.... .... .... ..... .... 136
7.3 Exercises.. .... ..... .... .... .... .... .... ..... .... 143
Bibliography... .... ..... .... .... .... .... .... ..... .... 143
8 Development Tools . ..... .... .... .... .... .... ..... .... 145
8.1 Design Flow... ..... .... .... .... .... .... ..... .... 145
8.2 Logic Synthesis. ..... .... .... .... .... .... ..... .... 146
8.3 High-Level Synthesis . .... .... .... .... .... ..... .... 149
8.4 Implementation. ..... .... .... .... .... .... ..... .... 151
8.5 Simulation. .... ..... .... .... .... .... .... ..... .... 152
8.5.1 Functional Simulation... .... .... .... ..... .... 152
8.5.2 Register-Transfer Simulation.. .... .... ..... .... 158
8.5.3 Logic Simulation... .... .... .... .... ..... .... 162
8.5.4 Timing Simulation and Timing Analysis. ..... .... 163
8.6 Other Tools.... ..... .... .... .... .... .... ..... .... 163
Bibliography... .... ..... .... .... .... .... .... ..... .... 164
Appendix A: Binary Field Operations.. .... .... .... ..... .... 165
Appendix B: Elliptic Curves.. .... .... .... .... .... ..... .... 169
Index ... .... .... .... ..... .... .... .... .... .... ..... .... 171