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VVHHDDLL 36th Design Automation Conference AAMMSS New Orleans, June 21-25, 1999 Analog and Mixed-Signal Modeling Using the VHDL-AMS Language Ernst Christen Beaverton, OR Kenneth Bakalar Rockville, MD Allen M. Dewey Durham, NC Eduard Moser Stuttgart, Germany (cid:20) ((cid:17)&KULVWHQ(cid:15)(cid:3).(cid:17)%DNDODU(cid:15)(cid:3)$(cid:17)0(cid:17)’HZH\(cid:15)(cid:3)((cid:17)0RVHU ’$&(cid:10)(cid:28)(cid:28)(cid:3)9+’/(cid:16)$06(cid:3)7XWRULDO VVHHDDLL Tutorial Organization AAMMSS ¤ Part I: Introduction to the VHDL-AMS Language • Continuous Time Concepts • Mixed Continuous/Discrete Time Concepts • Frequency Domain and Noise Modeling ¤ Part II: VHDL-AMS in Practical Applications • VHDL-AMS Modeling Guidelines • VHDL-AMS Modeling Techniques IC Applications • Modeling at Different Levels of Abstraction Telecom Applications • Modeling Multi-Disciplinary Systems Automotive Applications • MEMS Modeling Using the VHDL-AMS Language (cid:21) ((cid:17)&KULVWHQ(cid:15)(cid:3).(cid:17)%DNDODU(cid:15)(cid:3)$(cid:17)0(cid:17)’HZH\(cid:15)(cid:3)((cid:17)0RVHU ’$&(cid:10)(cid:28)(cid:28)(cid:3)9+’/(cid:16)$06(cid:3)7XWRULDO VVHHDDLL AAMMSS Part I: Introduction to the VHDL-AMS Language (cid:22) ((cid:17)&KULVWHQ(cid:15)(cid:3).(cid:17)%DNDODU(cid:15)(cid:3)$(cid:17)0(cid:17)’HZH\(cid:15)(cid:3)((cid:17)0RVHU ’$&(cid:10)(cid:28)(cid:28)(cid:3)9+’/(cid:16)$06(cid:3)7XWRULDO VVHHDDLL Outline AAMMSS ¤ Introduction ¤ Brief Overview of VHDL-AMS ¤ Basic Concepts: DAEs ¤ Systems with Conservation Semantics: Diode ¤ Mixed Technology: Diode with Self Heating ¤ Piecewise Defined Behavior: Compressor,Voltage Limiter ¤ Procedural Modeling: Weighted Summer ¤ Signal-Flow Modeling: Adder-Integrator, Conversions ¤ Solvability: Voltage Source, Signal Flow Amplifier ¤ Initial Conditions: Capacitor ¤ Implicit Quantities ¤ Mixed-Signal Modeling: Comparators, D/A Converter ¤ VHDL-AMS Model Execution ¤ Discontinuities: SCR, Voltage Limiter, Bouncing Ball ¤ Time-Dependent Modeling: Sinusoid Voltage Source ¤ Frequency Domain Modeling: Current Source, Filter ¤ Noise Modeling: Resistor, Diode ¤ Conclusion (cid:23) ((cid:17)&KULVWHQ(cid:15)(cid:3).(cid:17)%DNDODU(cid:15)(cid:3)$(cid:17)0(cid:17)’HZH\(cid:15)(cid:3)((cid:17)0RVHU ’$&(cid:10)(cid:28)(cid:28)(cid:3)9+’/(cid:16)$06(cid:3)7XWRULDO VVHHDDLL What is VHDL-AMS AAMMSS ¤ IEEE Std. 1076-1993: • VHDL (VHSIC Hardware Description Language) supports the description and simulation of event-driven systems. ¤ IEEE Std. 1076.1-1999: • Extension to VHDL to support the description and simulation of analog and mixed-signal circuits and systems ¤ IEEE Std. 1076.1-1999 together with IEEE Std. 1076-1993 is informally known as VHDL-AMS ¤ VHDL-AMS is a strict superset of IEEE Std. 1076-1993 • Any model valid in VHDL 1076 is valid in VHDL-AMS and yields the same simulation results (cid:24) ((cid:17)&KULVWHQ(cid:15)(cid:3).(cid:17)%DNDODU(cid:15)(cid:3)$(cid:17)0(cid:17)’HZH\(cid:15)(cid:3)((cid:17)0RVHU ’$&(cid:10)(cid:28)(cid:28)(cid:3)9+’/(cid:16)$06(cid:3)7XWRULDO VVHHDDLL Why is VHDL-AMS needed? AAMMSS ¤ VHDL 1076 is suitable for modeling and simulating discrete systems ¤ Many of today’s designs include at least some continuous characteristics: • System design Mixed-signal electrical designs Mixed electrical/non-electrical designs Modeling design environment • Analog design Analog behavioral modeling and simulation • Digital design Detailed modeling (e.g. submicron effects) ¤ Designers want a uniform description language (cid:25) ((cid:17)&KULVWHQ(cid:15)(cid:3).(cid:17)%DNDODU(cid:15)(cid:3)$(cid:17)0(cid:17)’HZH\(cid:15)(cid:3)((cid:17)0RVHU ’$&(cid:10)(cid:28)(cid:28)(cid:3)9+’/(cid:16)$06(cid:3)7XWRULDO VVHHDDLL Outline AAMMSS ¤ Introduction ¤ Brief Overview of VHDL-AMS ¤ Basic Concepts: DAEs ¤ Systems with Conservation Semantics: Diode ¤ Mixed Technology: Diode with Self Heating ¤ Piecewise Defined Behavior: Compressor,Voltage Limiter ¤ Procedural Modeling: Weighted Summer ¤ Signal-Flow Modeling: Adder-Integrator, Conversions ¤ Solvability: Voltage Source, Signal Flow Amplifier ¤ Initial Conditions: Capacitor ¤ Implicit Quantities ¤ Mixed-Signal Modeling: Comparators, D/A Converter ¤ VHDL-AMS Model Execution ¤ Discontinuities: SCR, Voltage Limiter, Bouncing Ball ¤ Time-Dependent Modeling: Sinusoid Voltage Source ¤ Frequency Domain Modeling: Current Source, Filter ¤ Noise Modeling: Resistor, Diode ¤ Conclusion (cid:26) ((cid:17)&KULVWHQ(cid:15)(cid:3).(cid:17)%DNDODU(cid:15)(cid:3)$(cid:17)0(cid:17)’HZH\(cid:15)(cid:3)((cid:17)0RVHU ’$&(cid:10)(cid:28)(cid:28)(cid:3)9+’/(cid:16)$06(cid:3)7XWRULDO VVHHDDLL VHDL 1076 Overview AAMMSS ¤ Entity defines interface of the model of a subsystem or physical device ¤ Each entity has one or more architectures, each implementing the behavior or structure of the subsystem or physical device ¤ Packages define collections of re-usable declarations and definitions: types, constants, functions etc. ¤ Strong type system ¤ Event-driven behavior described by processes that are sensitive to signals ¤ Well-defined simulation cycle, based on a canonical engine ¤ Predefined language environment (cid:27) ((cid:17)&KULVWHQ(cid:15)(cid:3).(cid:17)%DNDODU(cid:15)(cid:3)$(cid:17)0(cid:17)’HZH\(cid:15)(cid:3)((cid:17)0RVHU ’$&(cid:10)(cid:28)(cid:28)(cid:3)9+’/(cid:16)$06(cid:3)7XWRULDO VVHHDDLL VHDL-AMS Language Architecture AAMMSS New objects New objects and types and types New mixed-mode New mixed-mode Objects simulation cycle simulation cycle Types New attributes New attributes Simulation Environment Cycle VHDL 1076 Structure Behavior NNeeww inintteerrffaaccee NNeeww ssttaatteemmeennttss objects objects (cid:28) ((cid:17)&KULVWHQ(cid:15)(cid:3).(cid:17)%DNDODU(cid:15)(cid:3)$(cid:17)0(cid:17)’HZH\(cid:15)(cid:3)((cid:17)0RVHU ’$&(cid:10)(cid:28)(cid:28)(cid:3)9+’/(cid:16)$06(cid:3)7XWRULDO VVHHDDLL VHDL-AMS Highlights (1) AAMMSS ¤ Superset of VHDL 1076-1993 • Full VHDL 1076-1993 syntax and semantics is supported ¤ Adds new simulation model supporting continuous behavior • Continuous models based on differential algebraic equations (DAEs) • DAEs solved by dedicated simulation kernel: the analog solver • Handling of initial conditions, piecewise-defined behavior, and discontinuities • Optimization of the set of DAEs being solved and how the analog solver computes its solution are outside the scope of VHDL-AMS (cid:20)(cid:19) ((cid:17)&KULVWHQ(cid:15)(cid:3).(cid:17)%DNDODU(cid:15)(cid:3)$(cid:17)0(cid:17)’HZH\(cid:15)(cid:3)((cid:17)0RVHU ’$&(cid:10)(cid:28)(cid:28)(cid:3)9+’/(cid:16)$06(cid:3)7XWRULDO

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