6.035 Lecture 16, Register allocation - MIT

102 Pages·2010·0.38 MB·English

SSpprriinngg 22001100
Register Allocation
Courtesy of Saman Amarasinghe and
Armando Solar-Lezama. Used with permission.
5
Outline
• What is register allocation
• Webs
• Interference Graphs
• Graph coloring
• Spilling

• SSp lliittttiing

• More optimizations
Saman Amarasinghe & Armando Solar-Lezama 2 6.035
©MIT
Storingg values between def and use
• Program computes with values
– vvaalluuee ddeeffiinniittiioonnss ((wwhheerree ccoommppuutteedd))
– value uses (where read to compute new values)
• Values must be stored between def and use
– First Option
• sttore eachh vallue iin me mo ry att ddeffiiniittiio n
• retrieve from memory at each use
– Second Opption
• store each value in register at definition
• retrieve value from register at each use
Saman Amarasinghe & Armando Solar-Lezama 3 6.035
©MIT
Reggister Allocation
• Deciding which values to store in limited
numbb er off regii stters
• RReeggiisstteerr aallllooccaattiioonn hhaass aa ddiirreecctt iimmppaacctt oonn
performance
– Affects almost every statement of the program
– Eliminates expensive memory instructions
– # of instructions goes down due to direct
mmaanniippuullaattiioonn ooff rreeggiisstteerrss
• Limited mem-to-mem ALU ops, may need two instructions
– Probably is the optimization with the most impact!
Saman Amarasinghe & Armando Solar-Lezama 4 6.035
©MIT
What can be pput in a regg ister?
• Values stored in compiler-generated temps
• Language-level values
– Values stored in local scalar variables
– Big constants
– VVaalluueess ssttoorreedd iinn aarrrraayy eelleemmeennttss aanndd oobbjjeecctt ffiieellddss

• Issue: alias analysis
• Register set depends on the data-type
– floating-point values in floating point registers
– integer and pointer values in integer registers
Saman Amarasinghe & Armando Solar-Lezama 5 6.035
©MIT
Issues
• Fewer instructions when using registers
– Additional instructions when using memory accesses

• Registers are faster than memory

– wwiiddeerr ggaapp iinn ffaasstteerr , nneewweerr pprroocceessssoorrss

– Factor of about 4 bandwidth, factor of about 3 latency

– Could be bigger if program characteristics were different
• But only a small number of registers available

– UUssuuaallllyy 1166 iinntteeggeerr aanndd 1166 ffllooaattiinngg -ppooiinntt rreeggiisstteerrss

– Some of those registers have fixed users (ex: RSP, RBP)
Saman Amarasinghe & Armando Solar-Lezama 6 6.035
©MIT
15
Outline
• What is register allocation
• Key ideas in register allocation
• Webs
• Interference Graphs
• Graph coloring
• SSp lliittttiing
• More optimizations
Saman Amarasinghe & Armando Solar-Lezama 7 6.035
©MIT
Summaryy of Regg ister Allocation
• You want to put each temporary in a register
– But, you don’t have enough registers.
• Key Ideas:
11. WWhheenn aa tteemmppoorraarryy ggooeess ddeeaadd, iittss rreeggiisstteerr ccaann bbee rreeuusseedd
2. Two live temporaries can’t use the same register at the same time
Saman Amarasinghe & Armando Solar-Lezama 8 6.035
©MIT
Summaryy of Regg ister Allocation

• When a temporary goes dead, its register can be reused
•• EExxaammppllee::

a := c + d

e := a + b

ff ::== ee -- 11

(assume that a and e die after use)
• temporaries a, e and f can go in the same register

r11 := c + + dd

r1 := r1 + b

r1:= r1 – 1

Saman Amarasinghe & Armando Solar-Lezama 9 6.035

©MIT
Summaryy of Regg ister Allocation

• Two live temporaries can’t use the same register at the

ssaammee ttiimmee
• Example 2:

aa ::== cc ++ dd

e := a + b

f := e - a

• ttemporariies e andd a can nott go iin tthhe same r egiistter

r1 := c + d

r2 := r1 + b

rr11 ::== rr22 – rr11

Saman Amarasinghe & Armando Solar-Lezama 10 6.035

©MIT