Power-Aware Architecting: for data-dominated applications

118 Pages·2007·3.26 MB·English

by  Maarten Ditzel

Power-Aware Architecting
for data-dominated applications
Power-Aware Architecting
for data-dominated applications
by
Maarten Ditzel
Netherlands Organisation for Applied Scientific Research TNO
The Netherlands
Ralph H.J.M. Otten
Eindhoven University of Technology
The Netherlands
and
Wouter A. Serdijn
Delft University of Technology
The Netherlands
AC.I.P. Catalogue record for this book is available from the Library of Congress.
ISBN 978-1-4020-6419-7 (HB)
ISBN 978-1-4020-6420-3 (e-book)
Published by Springer,
P.O. Box 17, 3300 AADordrecht, The Netherlands.
www.springer.com
Printed on acid-free paper
All Rights Reserved
© 2007 Springer
No part of this work may be reproduced, stored in a retrieval system, or transmitted
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Preface
Thecomplexityofembeddedsystems-on-a-chipisrapidlygrowing.Differentexpertsareinvolvedin
thedesignprocess:applicationsoftwaredesigners,programmablecorearchitects,on-chipcommu-
nicationengineers,analoganddigitaldesigners,deepsubmicronspecialistsandprocessengineers.
In order to arrive at an optimum implementation compromises are needed across boundaries of
thedifferentdomainsofexpertise.
Therefore, the authors of this book take the point of view of the system architect who is a
generalist rather than an expert. He is responsible for the definition of a high level architecture,
whichisgloballyoptimal.Findinganoptimumrequiresaproperbalancebetweenarea,performance
andlastbutnotleastenergyconsumption.Thechallengeisnotonlythesizeofthedesignspace
butalsothefactthatthemostimportantdecisionsaretakenduringtheearlydesignphases.The
advantage of an early decision is that the impact on area, performance and energy consumption
is large. But the disadvantage is that the available information is often limited, incomplete and
inaccurate. The task of the system architect is to take the correct early decisions despite the
uncertainties.
This book provides a systematic way to support the system architect in this job. Therefore,
an iterative system-level design approach is defined where iterations are based on fast and ac-
curate estimations or predictions of area, performance and energy consumption. This method is
illustrated with a concrete real life example of multi-carrier communication. This book is the re-
sult of a Ph.D. thesis, which is part of the UbiCom project at Delft University of Technology. I
stronglyrecommendittoanyengineer,expertorspecialist,whoisinterestedindesigningembed-
dedsystems-on-a-chip.
Eindhoven,TheNetherlands, Prof. dr. ir. Jef van Meerbergen
April2007 Eindhoven University of Technology
Fellow Philips Research Eindhoven
Contents
1 Introduction................................................................. 1
1.1 High-levelsystemdesign.................................................... 1
1.1.1 Hardware–softwarepartitioning ....................................... 2
1.1.2 Hardwarespecification ............................................... 3
1.1.3 Designflow......................................................... 4
1.2 Powerasdesignconstraint.................................................. 5
1.3 Application............................................................... 7
1.4 Outline .................................................................. 7
2 Design trade-offs ............................................................ 9
2.1 Introduction .............................................................. 9
2.2 Areaestimation ........................................................... 9
2.2.1 Gateareaestimation................................................. 9
2.2.2 Interconnectestimation .............................................. 12
2.3 Delayestimation .......................................................... 12
2.3.1 Resourcedelayestimation ............................................ 13
2.3.2 Systemleveldelayestimation ......................................... 15
2.4 Powerestimation.......................................................... 16
2.4.1 Staticpowerdissipation.............................................. 17
2.4.2 Dynamicpowerdissipation ........................................... 17
2.4.3 Activity-basedpowerestimation....................................... 18
2.4.4 Systemlevelpowerestimation ........................................ 21
2.5 Area,delay,powertrade-offs................................................ 21
2.5.1 Areaversusdelay ................................................... 21
2.5.2 Delayversuspower .................................................. 23
2.5.3 Areaversusdelayversuspower........................................ 24
2.6 Summary................................................................. 25
3 Architecting with uncertainties .............................................. 27
3.1 Introduction .............................................................. 27
3.2 Applicationmodel......................................................... 28
3.3 Architectureclass ......................................................... 30
3.4 Hardware–softwarepartitioning ............................................. 31
3.4.1 Selectionconstraints................................................. 31
3.4.2 Costconstraints..................................................... 34
3.4.3 Mixedintegerlinearprogrammingformulation .......................... 38
3.5 Extensiontomultiplealgorithms ............................................ 38
3.5.1 Multiplealgorithmsupport ........................................... 38
3.5.2 Algorithmselectionsupport .......................................... 39
VIII Contents
3.5.3 Combinedsolution .................................................. 39
3.6 Dealingwithuncertainty ................................................... 40
3.7 CtoSystemCconversion................................................... 41
3.7.1 SystemClanguage................................................... 41
3.7.2 Conversionapproach................................................. 42
3.7.3 Behavioralconversion................................................ 43
3.7.4 Structuralconversion ................................................ 44
3.7.5 Conversionalternatives .............................................. 45
3.8 Summary................................................................. 47
4 Multi-carrier communications................................................ 49
4.1 Introduction .............................................................. 49
4.2 Multi-pathchannels ....................................................... 50
4.2.1 Channelimpulseresponse ............................................ 50
4.2.2 Delayspread........................................................ 50
4.2.3 Inter-symbolinterference ............................................. 51
4.2.4 Frequency-selectivefading ............................................ 52
4.3 Principlesofmulti-carriermodulation........................................ 52
4.3.1 OrthogonalFDM.................................................... 53
4.3.2 Guardinterval ...................................................... 54
4.3.3 OFDMdemodulation ................................................ 55
4.4 Optimalenergyassignment ................................................. 57
4.4.1 Channelmodel...................................................... 57
4.4.2 Systemmodel....................................................... 57
4.4.3 Optimizationproblem................................................ 58
4.4.4 Comparison ........................................................ 60
4.5 Quantizationlevel ......................................................... 62
4.5.1 Systemmodel....................................................... 62
4.5.2 PerformanceofquantizedOFDMsystems .............................. 65
4.5.3 Verification......................................................... 67
4.6 Clippinglevel ............................................................. 68
4.6.1 Systemmodel....................................................... 68
4.6.2 Noisemodeling...................................................... 68
4.6.3 Performanceofsoft-limitedOFDMsystems............................. 69
4.6.4 Verification......................................................... 71
4.7 Summary................................................................. 71
5 Application.................................................................. 73
5.1 Introduction .............................................................. 73
5.2 Transceiverspecification.................................................... 73
5.2.1 Frequencyband..................................................... 73
5.2.2 Grossbitrate....................................................... 74
5.2.3 Symbolformat...................................................... 76
5.2.4 Sub-symbolencodingscheme ......................................... 77
5.2.5 Timeandfrequencysynchronization ................................... 78
5.2.6 Multipleaccess...................................................... 78
5.2.7 Summary........................................................... 79
5.3 Implementationalternatives ................................................ 80
5.3.1 Buildingblocks ..................................................... 81
5.3.2 Processoralternatives................................................ 84
5.3.3 Costestimates ...................................................... 85
5.3.4 Implementationalternatives .......................................... 86
5.3.5 Partitioningresults .................................................. 87
Contents IX
5.4 Summary................................................................. 93
6 Conclusions.................................................................. 95
A Ubiquitous Communications................................................. 99
A.1 Applications .............................................................. 99
A.2 Necessitiesandconsequences................................................ 99
A.3 Preliminarychoices........................................................100
A.3.1 CarrierfrequencyandOFDMmodulation ..............................100
A.3.2 Infrastructure.......................................................100
B Mixed integer programming .................................................103
B.1 Linearprogramming .......................................................103
B.2 Mixedintegerprogramming.................................................104
B.3 Booleanalgebra...........................................................104
B.3.1 Booleaninversion ...................................................104
B.3.2 Booleanand........................................................105
B.3.3 Booleanor .........................................................105
C Possibilistic linear programming .............................................107
C.1 Introduction ..............................................................107
C.2 Fuzzyobjectivecoefficients .................................................107
C.3 Fuzzyobjective,constraintandlimitcoefficients...............................108
Bibliography.....................................................................111
References.......................................................................111
Index............................................................................115
1
Introduction
Worldwide, the demand for portable, hand-held devices is increasing strongly. More and more
cellphones, personal digital assistants (PDAs), MP3 players and Game Boys are bought. At the
same time, there is an increase in the number of different tasks such devices are expected to be
capableofdoing,rangingfromimageprocessingtodatacommunications.Thus,anoveralltrendis
visibletowardseversmallerdevicesintegratingevermorefunctions.Furthermore,mostprocessing
taskstendtobedata-centric,i.e.,mostcomputationaleffortisputinprocessingdatastreams.As
such,theoperatingcorescanbeseenasdatastreamprocessors.
The tendency of cramming more functionality in smaller devices is enabled by the continuing
growingcapabilitiesofsemi-conductortechnology.Eversmallerdevicescanoperateoneverhigher
frequencies, at lower operating supply voltages. Unfortunately, the advances in semi-conductor
technologydonotsolveallofourproblems,becausewedonotwanttodothesamewithimproved
devices; we want to do more with less. Therefore, the tools used to design and create the chips
havetobeimproved,sothattheincreasingdesigngapbetweenideasandsiliconrealizationscan
bebridged.
Thecallforportabledevices,especiallyintelecommunicationapplications,imposesincreasingly
strictrequirementson,forinstance,thedimensionsandtheenergyconsumptionoftheapparatus.
Ideally,yourcellphoneshouldbeabletooperateformonthsonasinglelightweightbattery.Unfor-
tunately,theenergystoragecapacityofbatteriesisonlybeingimprovedslowly[58,67].Therefore,
alreadyatthedesignstage,caremustbetakentoreducetheenergyconsumptionofthedevicesas
much as possible, but this should not affect the performance of the device or the required silicon
area.Adesignermustfindabalancebetweenthesecompetingdesignobjectives.
In this book, a high-level design method is presented that aids the designer in finding that
balance. Furthermore, design automation tools are implemented to test and verify this method
forthedesignofanOFDM(orthogonalfrequency-divisionmultiplexing)transceiver.Thischapter
introducestheideasandconceptsunderlyingthemethodandtools.
1.1 High-level system design
Asdevicesizesshrink,thecomplexityofachipincreases.Todescribethecomplexdesigns,design-
ershavetomakeuseoflanguagesathigherlevelsofabstractioninordertomeettime-to-market
deadlines. Current hardware description languages (HDLs) such as VHDL (very high speed inte-
gratedcircuithardwaredescriptionlanguage)andVerilogarenotequippedtohandletheselevels
of abstraction. As a result, designers resort to general programming languages to start with the
functionalexplorationoftheirdesigns.
High-level exploration of the design space is crucial when one must design an embedded
systemwithcompetingobjectiveswhilelimiteddesigntimeisavailable.Significantchangestothe
functionalityorthearchitectureatlowerlevelsareextremelyexpensiveandshouldbeavoidedinall
2 1 Introduction
cases.Furthermore,choicesmadeatahighleveltendtohaveahugeimpactontheperformanceand
costsofthefinaldesign.Forexample,givenanultralow-powermultiplier,achangeinalgorithm
that doubles or triples the number of multiplications still causes a large increase in the power
consumption.Infigure1.1,thetrade-offsbetweenabstractionlevel,thecostofchanges,theimpact
of design decisions and the available information is depicted in a so-called abstraction pyramid,
originallyintroducedin[35].Asimilarrepresentationofthe“reachability” canbefoundin[13].
low idea high
back-of-the-envelope
cheap
mathematical
n
o n
changes nformati executable bstractio impact
costof availablei cycle-accurate levelofa design
expensive
synthesizable
high low
designspace
Figure 1.1. Theabstractionpyramidrepresentsthetrade-offsbetweentheabstractionlevel,thecostof
changes,theimpactofdesigndecisionsandavailableinformation.
Becauseoftheirpopularityasgeneral-purposeprogramminglanguages,andthecorresponding
abundanceoflibrariesandtools,CandC++ arecommonlyusedtoconstructanexecutablespec-
ification of the functional part of the design. The desired functionality is described by a set of
functionsthattogetherimplementthealgorithm.Functionsareexpressedpurelysequentiallyand
anexplicitnotionoftimeislacking.Hence,timingcanonlybeexpressedastheorderinwhichthe
functionsarecalled.
However,thehighabstractionleveloftheseprogramminglanguagesallowsforaverytersede-
scriptionofthealgorithm.Moreover,changestothealgorithmareeasilyincorporatedand,because
ofthehighsimulationspeeds,quicklyverified.Thesepropertiesmakeprogramminglanguageslike
C or C++ the de facto standard for the initial, high-level specification of a complex design, even
thoughoriginallytheselanguageswereneverintendedforthispurpose.
1.1.1 Hardware–software partitioning
Once the initial specification of the algorithm is fixed, one of the first questions that arises is,
whichpartsofthealgorithmshouldbeimplementedinhardwareandsoftwareinordertofindan
implementation that best suits the design’s requirements (see figure 1.2). A key problem is that
atthisstage,usuallyonlyinsufficientoratleastinaccurateinformationtomakeaproperdecision
is available to the designer. Moreover, the partitioning problem is a multi-objective optimization
problemandalthoughmethodsformulti-objectiveoptimizationexist,normallythedesignerwants
to have a firm control over the decision process. In the end, it is up to the designer to prioritize
thedesignobjectives.