FPGA-specific arithmetic pipeline design using FloPoCo

79 Pages·2011·0.85 MB·English

FPGA-specific arithmetic pipeline design
using
FloPoCo
Bogdan Pasca, Ar´enaire
CARAMEL, 17/02/2011
Outline
FPGAs and floating-point
Datapath design using FloPoCo
Inside FloPoCo
Back-end for HLS
Conclusion
BogdanPasca,Ar´enaire FPGA-specificarithmeticpipelinedesign using FloPoCo 1
FPGAs and floating-point
FPGAs and floating-point
Datapath design using FloPoCo
Inside FloPoCo
Back-end for HLS
Conclusion
BogdanPasca,Ar´enaire FPGA-specificarithmeticpipelinedesign using FloPoCo 2
What’s an FPGA?
Field Programmable Gate Array
integrated circuit
has a regular architecture (hence array)
logic elements can be programmed to perform various functions
BogdanPasca,Ar´enaire FPGA-specificarithmeticpipelinedesign using FloPoCo 3
on chip memory blocks
digital signal processing (DSP) blocks (including multipliers)
connected by a configurable wire network
all connected to outside world by I/O pins
Modern FPGA Architecture
a set of configurable logic elements
BogdanPasca,Ar´enaire FPGA-specificarithmeticpipelinedesign using FloPoCo 4
digital signal processing (DSP) blocks (including multipliers)
connected by a configurable wire network
all connected to outside world by I/O pins
Modern FPGA Architecture
M M
A A
R R
M M
A A
R R
a set of configurable logic elements
on chip memory blocks
BogdanPasca,Ar´enaire FPGA-specificarithmeticpipelinedesign using FloPoCo 4
connected by a configurable wire network
all connected to outside world by I/O pins
Modern FPGA Architecture
P
S
M D M
A A
R P R
S
D
P
S
M D M
A A
R P R
S
D
a set of configurable logic elements
on chip memory blocks
digital signal processing (DSP) blocks (including multipliers)
BogdanPasca,Ar´enaire FPGA-specificarithmeticpipelinedesign using FloPoCo 4
all connected to outside world by I/O pins
Modern FPGA Architecture
P
S
M D M
A A
R P R
S
D
P
S
M D M
A A
R P R
S
D
a set of configurable logic elements
on chip memory blocks
digital signal processing (DSP) blocks (including multipliers)
connected by a configurable wire network
BogdanPasca,Ar´enaire FPGA-specificarithmeticpipelinedesign using FloPoCo 4
Modern FPGA Architecture
P
S
M D M
A A
R P R
S
D
P
S
M D M
A A
R P R
S
D
a set of configurable logic elements
on chip memory blocks
digital signal processing (DSP) blocks (including multipliers)
connected by a configurable wire network
all connected to outside world by I/O pins
BogdanPasca,Ar´enaire FPGA-specificarithmeticpipelinedesign using FloPoCo 4
Modern FPGA Architecture
P
S LUT
M D M
A A
R P R
S
D
P
S
M D M
A A
R P R
S
D
a set of configurable logic elements
on chip memory blocks
digital signal processing (DSP) blocks (including multipliers)
connected by a configurable wire network
all connected to outside world by I/O pins
BogdanPasca,Ar´enaire FPGA-specificarithmeticpipelinedesign using FloPoCo 4