Table Of ContentK13700 Cover 3/26/12 11:27 AM Page 1
C M Y CM MY CY CMY K
Computer Science
Sanchez
EMBEDDED
Canton
SYSTEMS CIRCUITS
and
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PROGRAMMING M
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EMBEDDED
Julio Sanchez
E
Maria P. Canton
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During the development of an engineered product, developers often nD SYSTEMS CIRCUITS
need to create an embedded system—a prototype—that demonstrates d
E
the operation/function of the device and proves its viability. Offering
D
practical tools for the development and prototyping phases, Embedded P
Systems Circuits and Programming provides a tutorial on microcontroller R and
programming and the basics of embedded design. S
O
Y
The book focuses on several development tools and resources:
G
S
• Standard and off-the-shelf components, such as input/output
PROGRAMMING
devices, integrated circuits, motors, and programmable RT
microcontrollers
AE
• The implementation of circuit prototypes via breadboards, the
M
in-house fabrication of test-time printed circuit boards (PCBs), M
and the finalization by the manufactured board Julio Sanchez
S
• Electronic design programs and software utilities for creating PCBs M
• Sample circuits that can be used as part of the targeted Maria P. Canton
embedded system IC
N
• The selection and programming of microcontrollers in the circuit
I
GR
For those working in electrical, electronic, computer, and software
C
engineering, this hands-on guide helps you successfully develop
systems and boards that contain digital and analog components U
and controls. The text includes easy-to-follow sample circuits and their
I
corresponding programs, enabling you to use them in your own work.
T
For critical circuits, the authors provide tested PCB files. Software, code,
S
and other materials are available at www.crcpress.com.
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EMBEDDED
SYSTEMS CIRCUITS
and
PROGRAMMING
K13700_FM.indd 1 3/14/12 5:36 PM
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EMBEDDED
SYSTEMS CIRCUITS
and
PROGRAMMING
Julio Sanchez
Maria P. Canton
Boca Raton London New York
CRC Press is an imprint of the
Taylor & Francis Group, an informa business
K13700_FM.indd 3 3/14/12 5:36 PM
CRC Press
Taylor & Francis Group
6000 Broken Sound Parkway NW, Suite 300
Boca Raton, FL 33487-2742
© 2012 by Taylor & Francis Group, LLC
CRC Press is an imprint of Taylor & Francis Group, an Informa business
No claim to original U.S. Government works
Version Date: 20120224
International Standard Book Number-13: 978-1-4398-7931-3 (eBook - PDF)
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Ta ble of Con tents
Pref ace xix
Chapt er 1 – Real-Time Com put ing 1
1.0 De fin ing the Em bed ded Sys tem 1
1.1 Em bed ded Sys tems His tory 2
1.2 Hard ware Com plex ity 2
1.2.1 Pro ces sor 3
1.2.2 Microcontrollers 3
1.2.3 Hard ware and Soft ware 3
1.3 Ex e cu tion in Real-Time 4
1.3.1 Hard and Soft Real-Time Sys tems 5
Chap ter 2 – Cir cuit Fun da men tals 7
2.1 Elec tri cal Cir cuit 7
2.2 Cir cuit Con cepts and Com po nents 8
2.3 Dig i tal Elec tron ics 9
2.4 Dio de 10
2.4.1 Light-Emit ting Di ode (LED) 12
2.5 Tran sis tors 13
2.5.1 Bi po lar Tran sis tor 13
2.5.2 MOS Tran sis tor 15
Chapt er 3 – Logic Gates and Cir cuit Com pon ents 17
3.1 Logic Gates 17
3.2 Power Supp lies 18
3.3 Clocked Logic and Flip-Flops 19
3.3.1 RS Flip-Flop 19
3.3.2 Clocked Cir cuits 20
3.3.3 D Flip-Flop 21
3.3.4 Edge-Trig gered D Flip-Flop 23
3.3.5 Pre set and Clear Sig nals 23
3.3.6 D Flip-Flop Wave form Ac tion 24
3.3.7 Flip-Flop Ap pli ca tions 25
3.4 Dig i tal Clocks 26
3.4.1 Clock Wavef orms 26
v
vi Em bed ded Sys tems: Cir cuits and Pro gram ming
3.4.2 TTL Clock 27
3.4.3 555 Timer 28
3.4.4 Microcontroller Clocks 29
3.5 Coun ters and Fre quency Di vid ers 29
3.5.1 Fre quency Di vid ers 30
3.5.2 JK Flip-Flop Coun ter 30
3.5.3 Rip ple Coun ters 31
3.5.4 De cod ing Gates 32
3.5.5 Syn chro nous Coun ters 33
3.5.6 Coun ter ICs 35
3.5.7 Shift Reg is ters 36
3.6 Multiplexers and Demultiplexers 37
3.6.1 Multiplexers 38
3.6.2. Demultiplexers 39
3.6.3 Multi plexer and Demultiplexer ICs 40
Chapt er 4 – In put and Out put De vices 41
4.1 Ob tain ing In put 41
4.2 Switches 41
4.2.1 Switch Cont act Bounce 43
4.2.2 Keypads 44
4.3 Out put De vices 45
4.3.1 Seven-Seg ment LED 45
4.3.2 Liq uid Crys tal Dis plays 47
4.3.3 LCD Tech nol o gies 48
Chapt er 5 – From Cir cuit Schem at ics to PCB 51
5.1 Cir cuit Di a gram 51
5.1.1 Sym bols 52
5.1.2 Tools for Elec tronic Cir cuit De sign 53
5.2 Cir cuit Board Des ign 53
5.2.1 Board De sign Stan dards 54
5.2.2 Gerber File For mat 54
5.3 De vel op ing the Cir cuit Pro to type 55
5.3.1 Bread board 56
Lim i ta tions of Bread boards 58
Breadboarding Tools and Tech niques 58
5.3.2 Wire-Wrapp ing 59
5.3.3 Perfboards 60
5.4 Printed Circ uit Boards 60
5.4.1 PCB Lay ers 61
5.4.2 PCB Con nec tors 62
5.5 Mak ing Your Own PCB 62
5.5.1 Draw ing the CPB Cir cuit 63
5.5.2 Print ing the PCB 65
5.5.3 Transf er ring the PCB Im age 65
5.5.4 Etch ing the Board 65
5.5.5 Fin ish ing the Board 66
5.5.6 Back side Im age 66
Tab le of Cont ents vii
5.6 Sur face-Mount Com po nents 66
5.6.1 SMT Adapt ers 67
5.6.2 Sol der ing SMT Com po nents 68
5.7 Trou ble shoot ing the Cir cuit Board 68
5.7.1 Cir cuit Test ing Tools 69
Chapt er 6 – In trod uci ng the Microcontroller 71
6.1 A Comp uter on a Chip 71
6.2 PICMicro Microcontroller 72
6.2.1 Pro gramm ing the PIC 73
De vel op ment Boards 74
6.2.2 Prototyping a PIC Cir cuit 75
6.3 PIC Arc hit ect ure 75
6.3.1 Base line PIC Fam ily 75
PIC10 De vices 75
PIC12 De vices 76
PIC14 De vices 78
6.3.2 Mid-Range PIC Fam ily 79
PIC16 De vices 79
6.3.3 High-Per for mance PIC Fam ily 79
PIC18 De vices 80
Chap ter 7 – Ar chi tec ture and In struc tion Set 83
7.1 Mid-Range PIC Ar chi tec ture 83
7.1.1 Har vard Ar chi tec ture 83
7.1.2 CISC ver sus RISC 84
7.1.3 Sin gle-Word In struc tions 85
7.1.4 In struc tion For mat 86
7.1.5 Mid-Range De vice Ver sions 87
7.1.6 Arith me tic-Logic Unit 87
7.2 Data Mem ory Or ga ni za tion 87
7.2.1 w Reg is ter 87
7.2.2 Data Reg is ters 88
Mem ory Banks 88
SFRs 88
GPRs 91
7.2.3 In di rect Ad dress ing 93
7.3 Mid-Range I/O and Per iphe r als 93
7.3.1 Ports 94
7.3.2 Tim ers 95
7.3.3 Cap ture and Com pare Mod ule 95
7.3.4 Mas ter Syn chro nous Se rial Port 96
7.3.5 USART Mod ule 96
7.3.6 A/D Mod ule 96
7.4 Mid-Range PIC Core Feat ures 97
7.4.1 Os cil la tor 97
7.4.2 Sys tem Re set 98
7.4.3 In ter rupts 100
7.5 Mid-Range Ins truc tion Set 101
viii Em bed ded Sys tems: Cir cuits and Pro gram ming
102
7.5.1 STATUS and OPTION Reg is ters 102
7.6 EEPROM Data Stor age 104
7.6.1 EEPROM in Mid-Range PICs 105
Chap ter 8 – Em bed ded Sys tems Pro gram ming 107
8.1 As sem bly ver sus High-Level Lan guages 107
8.1.2 Em bed ded Sys tems 107
8.2 In te grated De vel op ment En vi ron ment 108
8.2.1 In stall ing MPLAB 109
8.2.2 MPLAB Pro ject 111
8.2.3 Pro ject Build Op tions 112
8.2.4 Build ing the Pro ject 114
8.2.5 Quickbuild Op tion 114
8.3 Sim u la tors and Debuggers 115
8.3.1 MPLAB SIM 115
8.3.2 MPLAB Hardw are Debuggers 117
8.3.3 Im pro vised Debugger 119
8.4 Pro gram mers 119
8.5 En gi neer ing PIC Soft ware 120
8.5.1 Us ing Pro gram Com ments 120
Pro gram Header 121
Com mented Ban ners 122
Com mented Bitmaps 123
8.5.2 De fin ing Data El e ments 123
cblock Di rec tive 124
8.5.3 Bank ing Tech niques 124
banksel Di rec tive 125
Bank Se lec tion Mac ros 125
Dep re cated Bank ing In struc tions 126
8.5.4 Pro ces sor and Con fig u ra tion Con trols 126
Con fig u ra tion Bits 127
8.5.5 Nam ing Con ven tions 128
8.5.6 Errorlevel Di rec tive 131
8.6 Pseudo In struc tions 131
Chapt er 9 – I/O Cir cuits and Prog rams 133
9.1 Simp le Inp ut and Outp ut 133
9.1.1 16F84A Pro gram ming Tem plate 133
9.2 Tem plate Cir cuits 134
9.2.1 MCLR and Os cil la tor Tem plate 135
9.2.2 Power Sup plies 135
Volt age Reg u la tor 136
9.3 Simp le Cir cuits and Prog rams 136
9.3.1 Sin gle LED Cir cuit 137
LED Flasher Pro gram 139
9.3.2 LED/Pushbutton Cir cuit 141
9.3.3 Mul ti ple LED Cir cuit 143
9.4 Seven-Segm ent LED 146
Tab le of Cont ents ix
9.5 I/O Demo Board 147
9.5.1 TestDemo1 Pro gram 148
9.6 Com par i sons in PIC Pro gram ming 151
9.6.1 PIC Carry Flag 152
Chapt er 10 – PIC Int er rupt Sys tem 153
10.1 Interrupts 153
10.1.1 16F84 In ter rupts 153
10.1.2 In ter rupt Con trol Reg is ter 153
10.1.3 OPTION Reg is ter 154
10.2 Int err upt Sources 155
10.2.1 Port B Ex ter nal In ter rupt 156
10.2.2 Timer0 In ter rupt 156
10.2.3 Port B Line Change Int er rupt 157
Mul ti ple Ex ter nal In ter rupts 159
10.2.4 EEPROM Data Write In ter rupt 159
10.3 De vel op ing the In ter rupt Han dler 159
10.3.1 Con text Sav ing Op er a tions 160
Sav ing W and STATUS Reg is ters 160
10.4 In ter rupt Pro gram ming 161
10.4.1 Pro gram ming the Ex ter nal In ter rupt 161
RB0 In ter rupt Ini tial iza tion 162
RB0 ISR 163
10.4.2 Wake-Up from SLEEP Us ing the RB0 Int er rupt 164
SleepDemo Prog ram 165
10.4.3 Port B Bits 4-7 Stat us Change Int er rupt 166
RB4-7 In ter rupt Ini tial iza tion 166
RB4-7 Change ISR 168
10.5 Sam ple Pro grams 170
10.6 Dem on stra tion Pro grams 171
10.6.1 RB0Int Pro gram 171
10.6.2 SleepDemo Pro gram 175
10.6.3 RB4to7Int Pro gram 177
Chapt er 11 – Tim ers and Count ers 183
11.1 Con troll ing the Time Lapse 183
11.1.1 16F84 Timer0 Mod ule 183
11.1.2 Timer0 Op er a tion 184
Timer0 In ter rupt 185
Timer0 Prescaler 185
11.2 De lays Us ing Timer0 186
11.2.1 Long De lay Loops 187
How Ac cu rate Is the De lay? 188
11.3 Timer0 as a Coun ter 188
11.4 Timer0 Pro gram ming 189
11.4.1 Pro gramm ing a Coun ter 190
Timer/Coun ter Test Cir cuit 190
TimerCounter Pro gram 191
Code De tails 191
